Issued Patents All Time
Showing 201–225 of 247 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6101152 | Method of operating a synchronous memory device | Michael Farmwald | 2000-08-08 |
| 6085284 | Method of operating a memory device having a variable data output length and an identification register | Michael Farmwald | 2000-07-04 |
| 6070222 | Synchronous memory device having identification register | Michael Farmwald | 2000-05-30 |
| 6067592 | System having a synchronous memory device | Michael Farmwald | 2000-05-23 |
| 6049846 | Integrated circuit having memory which synchronously samples information with respect to external clock signals | Michael Farmwald | 2000-04-11 |
| 6044426 | Memory system having memory devices each including a programmable internal register | Michael Farmwald | 2000-03-28 |
| 6038195 | Synchronous memory device having a delay time register and method of operating same | Michael Farmwald | 2000-03-14 |
| 6034918 | Method of operating a memory having a variable data output length and a programmable register | Michael Farmwald | 2000-03-07 |
| 6035365 | Dual clocked synchronous memory device having a delay time register and method of operating same | Michael Farmwald | 2000-03-07 |
| 6032215 | Synchronous memory device utilizing two external clocks | Michael Farmwald | 2000-02-29 |
| 6032214 | Method of operating a synchronous memory device having a variable data output length | Michael Farmwald | 2000-02-29 |
| 5995443 | Synchronous memory device | Michael Farmwald | 1999-11-30 |
| 5983320 | Method and apparatus for externally configuring and modifying the transaction request response characteristics of a semiconductor device coupled to a bus | Michael Farmwald | 1999-11-09 |
| 5954804 | Synchronous memory device having an internal register | Michael Farmwald | 1999-09-21 |
| 5953263 | Synchronous memory device having a programmable register and method of controlling same | Michael Farmwald | 1999-09-14 |
| 5945862 | Circuitry for the delay adjustment of a clock signal | Kevin S. Donnelly, Jun Kim, Bruno W. Garlepp, Thomas H. Lee, Pak Shing Chau +3 more | 1999-08-31 |
| 5928343 | Memory module having memory devices containing internal device ID registers and method of initializing same | Michael Farmwald | 1999-07-27 |
| 5915105 | Integrated circuit I/O using a high performance bus interface | Michael Farmwald | 1999-06-22 |
| 5896545 | Transmitting memory requests for multiple block format memory operations the requests comprising count information, a mask, and a second mask | Richard M. Barth, Matthew Murdy Griffin, Frederick A. Ware | 1999-04-20 |
| 5872996 | Method and apparatus for transmitting memory requests by transmitting portions of count data in adjacent words of a packet | Richard M. Barth, Matthew Murdy Griffin, Frederick A. Ware | 1999-02-16 |
| 5841580 | Integrated circuit I/O using a high performance bus interface | Michael Farmwald | 1998-11-24 |
| 5841715 | Integrated circuit I/O using high performance bus interface | Michael Farmwald | 1998-11-24 |
| 5809263 | Integrated circuit I/O using a high performance bus interface | Michael Farmwald | 1998-09-15 |
| 5799051 | Delay stage circuitry for a ring oscillator | Wingyu Leung | 1998-08-25 |
| 5765020 | Method of transferring data by transmitting lower order and upper odermemory address bits in separate words with respective op codes and start information | Richard M. Barth, Matthew Murdy Griffin, Frederick A. Ware | 1998-06-09 |