Issued Patents All Time
Showing 176–200 of 247 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6570814 | Integrated circuit device which outputs data after a latency period transpires | Michael Farmwald | 2003-05-27 |
| 6564281 | Synchronous memory device having automatic precharge | Michael Farmwald | 2003-05-13 |
| 6546446 | Synchronous memory device having automatic precharge | Michael Farmwald | 2003-04-08 |
| 6542976 | Memory device having an internal register | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2003-04-01 |
| 6539072 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Thomas H. Lee, Mark G. Johnson, Benedict Lau +7 more | 2003-03-25 |
| 6532522 | Asynchronous request/synchronous data dynamic random access memory | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2003-03-11 |
| 6516365 | Apparatus and method for topography dependent signaling | Richard M. Barth, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2003-02-04 |
| 6513081 | Memory device which receives an external reference voltage signal | Michael Farmwald | 2003-01-28 |
| 6452863 | Method of operating a memory device having a variable data input length | Michael Farmwald | 2002-09-17 |
| 6426916 | Memory device having a variable data output length and a programmable register | Michael Farmwald | 2002-07-30 |
| 6415339 | Memory device having a plurality of programmable internal registers and a delay time register | Michael Farmwald | 2002-07-02 |
| 6405296 | Asynchronous request/synchronous data dynamic random access memory | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2002-06-11 |
| 6378020 | System having double data transfer rate and intergrated circuit therefor | Michael Farmwald | 2002-04-23 |
| 6356975 | Apparatus and method for pipelined memory operations | Richard M. Barth, Ely Tsern, Donald C. Stark, Craig E. Hampel, Frederick A. Ware +2 more | 2002-03-12 |
| 6324120 | Memory device having a variable data output length | Michael Farmwald | 2001-11-27 |
| 6321282 | Apparatus and method for topography dependent signaling | Richard M. Barth, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2001-11-20 |
| 6314051 | Memory device having write latency | Michael Farmwald | 2001-11-06 |
| 6304937 | Method of operation of a memory controller | Michael Farmwald | 2001-10-16 |
| 6266285 | Method of operating a memory device having write latency | Michael Farmwald | 2001-07-24 |
| 6260097 | Method and apparatus for controlling a synchronous memory device | Michael Farmwald | 2001-07-10 |
| 6209071 | Asynchronous request/synchronous data dynamic random access memory | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2001-03-27 |
| 6185644 | Memory system including a plurality of memory devices and a transceiver device | Michael Farmwald | 2001-02-06 |
| 6182184 | Method of operating a memory device having a variable data input length | Michael Farmwald | 2001-01-30 |
| 6128696 | Synchronous memory device utilizing request protocol and method of operation of same | Michael Farmwald | 2000-10-03 |
| 6125157 | Delay-locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Thomas H. Lee, Mark G. Johnson, Benedict Lau +6 more | 2000-09-26 |