Issued Patents All Time
Showing 126–150 of 247 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7308065 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Thomas H. Lee, Mark G. Johnson, Benedict Lau +7 more | 2007-12-11 |
| 7308044 | Technique for receiving differential multi-PAM signals | Jared L. Zerbe, Grace Tsang, Bruno W. Garlepp, Carl W. Werner | 2007-12-11 |
| 7298807 | Circuit, apparatus and method for adjusting a duty-cycle of a clock signal in response to incoming serial data | Jared L. Zerbe, Carl W. Werner | 2007-11-20 |
| 7292637 | Noise-tolerant signaling schemes supporting simplified timing and data recovery | Andrew Ho, Vladimir Stojanovic, Fred F. Chen, Elad Alon | 2007-11-06 |
| RE39879 | Method of transferring data by transmitting lower order and upper order memory address bits in separate words with respective op codes and start information | Richard M. Barth, Matthew Murdy Griffin, Frederick A. Ware | 2007-10-09 |
| 7213121 | Memory device having asynchronous/synchronous operating modes | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2007-05-01 |
| 7210015 | Memory device having at least a first and a second operating mode | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2007-04-24 |
| 7209997 | Controller device and method for operating same | Michael Farmwald | 2007-04-24 |
| 7199615 | High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation | Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Fred F. Chen, Elad Alon | 2007-04-03 |
| 7194155 | Adaptive control for mitigating interference in a multimode transmission medium | Joseph M. Kahn, Elad Alon, Vladimir Stojanovic | 2007-03-20 |
| 7174400 | Integrated circuit device that stores a value representative of an equalization co-efficient setting | Richard M. Barth, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2007-02-06 |
| 7142612 | Method and apparatus for multi-level signaling | Scott C. Best, William Stonecypher | 2006-11-28 |
| 7133463 | Linear transformation circuits | Amir Amirkhany, Vladimir Stojanovic, Elad Alon, Jared L. Zerbe | 2006-11-07 |
| 7126378 | High speed signaling system with adaptive transmit pre-emphasis | Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Fred F. Chen, Elad Alon | 2006-10-24 |
| 7124221 | Low latency multi-level communication interface | Jared L. Zerbe, Bruno W. Garlepp, Pak Shing Chau, Kevin S. Donnelly, Stefanos Sidiropoulos +2 more | 2006-10-17 |
| 7110322 | Memory module including an integrated circuit device | Michael Farmwald | 2006-09-19 |
| 7099395 | Reducing coupled noise in pseudo-differential signaling systems | Stefanos Sidiropoulos, Yingxuan Li | 2006-08-29 |
| 7093145 | Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals | Carl W. Werner, Pak Shing Chau, Scott C. Best, Stefanos Sidiropoulos | 2006-08-15 |
| 7089442 | Fault-tolerant clock generator | Kun-Yung Chang | 2006-08-08 |
| 7085906 | Memory device | Richard M. Barth, Craig E. Hampel, Frederick A. Ware | 2006-08-01 |
| 7076377 | Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit | Dennis Kim, Jared L. Zerbe, William Stonecypher | 2006-07-11 |
| 7051130 | Integrated circuit device that stores a value representative of a drive strength setting | Richard M. Barth, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-05-23 |
| 7051129 | Memory device having programmable drive strength setting | Richard M. Barth, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2006-05-23 |
| 7042914 | Calibrated data communication system and method | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Leung Yu +5 more | 2006-05-09 |
| 7039147 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Thomas H. Lee, Mark G. Johnson, Benedict Lau +7 more | 2006-05-02 |