Issued Patents All Time
Showing 26–50 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12007916 | Local internal discovery and configuration of individually selected and jointly selected devices | — | 2024-06-11 |
| 12002532 | Command/address channel error detection | Frederick A. Ware | 2024-06-04 |
| 12001283 | Energy efficient storage of error-correction-detection information | Michael Raymond Miller, Stephen Magee | 2024-06-04 |
| 11996160 | Low power signaling interface | Frederick A. Ware, Carl W. Werner | 2024-05-28 |
| 11973153 | Synchronous wired-or ACK status for memory with variable write latency | Yohan U. Frans, Simon Li, Jun Kim | 2024-04-30 |
| 11967364 | Variable width memory module supporting enhanced error detection and correction | Frederick A. Ware, Kenneth L. Wright | 2024-04-23 |
| 11955165 | Memories and memory components with interconnected and redundant data interfaces | Frederick A. Ware, Ely Tsern, Thomas A. Giovannini, Scott C. Best, Kenneth L. Wright | 2024-04-09 |
| 11953981 | Memory module register access | Thomas J. Giovannini, Catherine Chen, Scott C. Best, Frederick A. Ware | 2024-04-09 |
| 11947474 | Multi-mode memory module and memory component | Frederick A. Ware, Kenneth L. Wright | 2024-04-02 |
| 11941369 | Dual-domain combinational logic circuitry | Frederick A. Ware | 2024-03-26 |
| 11914888 | Memory component with input/output data rate alignment | Frederick A. Ware, Torsten Partsch | 2024-02-27 |
| 11900984 | Data destruction | Torsten Partsch, Helena Handschuh | 2024-02-13 |
| 11868619 | Partial array refresh timing | Liji Gopalakrishnan, Thomas Vogelsang | 2024-01-09 |
| 11862236 | Memory component for deployment in a dynamic stripe width memory system | Frederick A. Ware, Kenneth L. Wright | 2024-01-02 |
| 11842761 | Memory system with multiple open rows per bank | Thomas Vogelsang, Liji Gopalakrishnan | 2023-12-12 |
| 11836044 | Error coalescing | — | 2023-12-05 |
| 11836099 | Memory system with cached memory module operations | Frederick A. Ware, Kenneth L. Wright, Craig E. Hampel | 2023-12-05 |
| 11815940 | Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules | Frederick A. Ware, Ely Tsern, Thomas J. Giovannini, Kenneth L. Wright | 2023-11-14 |
| 11809345 | Data-buffer component with variable-width data ranks and configurable data-rank timing | Thomas J. Giovannini, Catherine Chen | 2023-11-07 |
| 11804259 | Floating body dram with reduced access energy | Frederick A. Ware, Zhichao Lu, Kenneth L. Wright | 2023-10-31 |
| 11790973 | Memory component with efficient write operations | Frederick A. Ware, Brent Haukness, Kenneth L. Wright, Thomas Vogelsang | 2023-10-17 |
| 11782807 | Memory module with dedicated repair devices | Frederick A. Ware, Brent Haukness, Scott C. Best | 2023-10-10 |
| 11755508 | High-performance, high-capacity memory systems and modules | Frederick A. Ware, Ely Tsern, Thomas J. Giovannini, Craig E. Hampel, Scott C. Best +1 more | 2023-09-12 |
| 11755220 | Adjustable access energy and access latency memory system and devices | Frederick A. Ware | 2023-09-12 |
| 11735287 | Buffer circuit with adaptive repair capability | Scott C. Best, Paul William Roukema | 2023-08-22 |