Issued Patents All Time
Showing 276–300 of 739 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10802981 | Techniques for storing data and tags in different memory arrays | — | 2020-10-13 |
| 10795834 | Memory controller for selective rank or subrank access | Craig E. Hampel | 2020-10-06 |
| 10784868 | Low power logic circuitry | John Eric Linstadt | 2020-09-22 |
| 10771231 | Signaling system with adaptive timing calibration | Bret G. Stott, Craig E. Hampel | 2020-09-08 |
| 10762948 | Floating body DRAM with reduced access energy | John Eric Linstadt, Zhichao Lu, Kenneth L. Wright | 2020-09-01 |
| 10762010 | Multi-mode memory module and memory component | John Eric Linstadt, Kenneth L. Wright | 2020-09-01 |
| 10761587 | Optimizing power in a memory device | Dinesh Patil, Amir Amirkhany, Farrukh Aquil, Kambiz Kaviani | 2020-09-01 |
| 10757835 | Cooling technology for cryogenic link | Carl W. Werner | 2020-08-25 |
| 10755764 | Memory component that enables calibrated command- and data-timing signal arrival | — | 2020-08-25 |
| 10739841 | Dynamically changing data access bandwidth by selectively enabling and disabling data links | — | 2020-08-11 |
| 10734064 | Controlling a dynamic-stripe-width memory module | John Eric Linstadt, Kenneth L. Wright | 2020-08-04 |
| 10725099 | Memory controller with integrated test circuitry | — | 2020-07-28 |
| 10726901 | Dual-domain memory | John Eric Linstadt | 2020-07-28 |
| 10706913 | Reduced transport energy in a memory system | John Eric Linstadt, Thomas Vogelsang | 2020-07-07 |
| 10706910 | Memory controller | Ely Tsern, Richard E. Perego, Craig E. Hampel | 2020-07-07 |
| 10705989 | Protocol including timing calibration between memory request and data transfer | Holden D. Jessup | 2020-07-07 |
| 10705988 | Memory module threading with staggered data transfers | Hongzhong Zheng | 2020-07-07 |
| 10700671 | Data transmission using delayed timing signals | Ely Tsern, Brian S. Leibowitz, Jared L. Zerbe | 2020-06-30 |
| 10678719 | Memory system with cached memory module operations | Kenneth L. Wright, John Eric Linstadt, Craig E. Hampel | 2020-06-09 |
| 10673582 | Communication channel calibration for drift conditions | Richard E. Perego, Craig E. Hampel | 2020-06-02 |
| 10672450 | Protocol for memory power-mode control | Wayne F. Ellis, Wayne S. Richardson, Akash Bansal, Lawrence Lai, Kishore Ven Kasamsetty | 2020-06-02 |
| 10671561 | Memory system with independently adjustable core and interface data rates | — | 2020-06-02 |
| 10664344 | Memory repair method and apparatus based on error code tracking | Ely Tsern | 2020-05-26 |
| 10656851 | Maintenance operations in a DRAM | Robert E. Palmer, John W. Poulton | 2020-05-19 |
| 10650881 | Variable width memory module supporting enhanced error detection and correction | John Eric Linstadt, Kenneth L. Wright | 2020-05-12 |