Issued Patents All Time
Showing 76–100 of 310 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9667359 | Periodic calibration for communication channels by drift tracking | Frederick A. Ware, Richard E. Perego | 2017-05-30 |
| 9667406 | Communication channel calibration for drift conditions | Frederick A. Ware, Richard E. Perego | 2017-05-30 |
| 9652176 | Memory controller for micro-threaded memory operations | Frederick A. Ware, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai | 2017-05-16 |
| 9628257 | Communication channel calibration for drift conditions | Frederick A. Ware, Richard E. Perego | 2017-04-18 |
| 9563583 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Ely Tsern | 2017-02-07 |
| 9507738 | Method and system for synchronizing address and control signals in threaded memory modules | Arun Vaidyanath | 2016-11-29 |
| 9472262 | Memory controller | Frederick A. Ware, Ely Tsern, Richard E. Perego | 2016-10-18 |
| 9460021 | System including hierarchical memory modules having different types of integrated circuit memory devices | Mark A. Horowitz | 2016-10-04 |
| 9432179 | Signaling system with adaptive timing calibration | Bret G. Stott, Frederick A. Ware | 2016-08-30 |
| 9411767 | Flash controller to provide a value that represents a parameter to a flash memory | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2016-08-09 |
| 9367248 | Memory component with pattern register circuitry to provide data patterns for calibration | Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern, Frederick A. Ware | 2016-06-14 |
| 9323711 | Chip having port to receive value that represents adjustment to transmission parameter | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2016-04-26 |
| 9311976 | Memory module | Frederick A. Ware, Ely Tsern, Richard E. Perego | 2016-04-12 |
| 9292223 | Micro-threaded memory | Frederick A. Ware, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai | 2016-03-22 |
| 9256557 | Memory controller for selective rank or subrank access | Frederick A. Ware | 2016-02-09 |
| 9256376 | Methods and circuits for dynamically scaling DRAM power and performance | Ely Tsern, Thomas Vogelsang, Scott C. Best | 2016-02-09 |
| 9257159 | Low power memory device | Frederick A. Ware, Ely Tsern | 2016-02-09 |
| 9257151 | Printed-circuit board supporting memory systems with multiple data-bus configurations | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Ely Tsern | 2016-02-09 |
| 9195602 | System including hierarchical memory modules having different types of integrated circuit memory devices | Mark A. Horowitz | 2015-11-24 |
| 9170894 | Memory error detection | Ian Shaeffer | 2015-10-27 |
| 9160466 | Periodic calibration for communication channels by drift tracking | Frederick A. Ware, Richard E. Perego | 2015-10-13 |
| 9152581 | Chip storing a value that represents adjustment to output drive strength | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2015-10-06 |
| 9135967 | Chip having register to store value that represents adjustment to output drive strength | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2015-09-15 |
| 9135186 | Chip having port to receive value that represents adjustment to output driver parameter | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2015-09-15 |
| 9123433 | Memory component with pattern register circuitry to provide data patterns for calibration | Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern, Frederick A. Ware | 2015-09-01 |