Issued Patents All Time
Showing 101–125 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8908454 | Memory architecture with redundant resources | Thomas Vogelsang | 2014-12-09 |
| 8873329 | Patterned memory page activation | Hongzhong Zheng | 2014-10-28 |
| 8861259 | Resistance change memory cell circuits and methods | — | 2014-10-14 |
| 8773925 | Multilevel DRAM | Yoshihito Koya | 2014-07-08 |
| 8665642 | Pattern-sensitive coding of data for storage in multi-level memory cells | Bohuslav Rychlik, John Eric Linstadt, Steven C. Woo | 2014-03-04 |
| 8661185 | Electronic library for managing data on removable storage devices | Tyler Thorp, Henry Hutton | 2014-02-25 |
| 8645617 | Memory device for concurrent and pipelined memory operations | Ian Shaeffer | 2014-02-04 |
| 8644078 | Pulse control for nonvolatile memory | Mark D. Kellam, Gary B. Bronner, Kevin S. Donnelly | 2014-02-04 |
| 8553473 | Clock generator circuits with non-volatile memory for storing and/or feedback-controlling phase and frequency | Jaeha Kim | 2013-10-08 |
| 8508998 | Multiple plane, non-volatile memory with synchronized control | — | 2013-08-13 |
| 8484407 | Flash memory timing pre-characterization | Ian Shaeffer | 2013-07-09 |
| 8351259 | Methods and apparatus for using a configuration array similar to an associated data array | Tyler Thorp | 2013-01-08 |
| 8344475 | Integrated circuit heating to effect in-situ annealing | Ian Shaeffer, Gary B. Bronner, Kevin S. Donnelly, Frederick A. Ware, Mark A. Horowitz | 2013-01-01 |
| 8300477 | Piecewise erasure of flash memory | Ian Shaeffer, Gary B. Bronner | 2012-10-30 |
| 7870471 | Methods and apparatus for employing redundant arrays to configure non-volatile memory | Tyler Thorp | 2011-01-11 |
| 7870472 | Methods and apparatus for employing redundant arrays to configure non-volatile memory | Tyler Thorp | 2011-01-11 |
| 7863950 | Apparatus for adaptive trip point detection | Tyler Thorp, Mark G. Johnson | 2011-01-04 |
| 7863951 | Methods for adaptive trip point detection | Tyler Thorp, Mark G. Johnson | 2011-01-04 |
| 7843729 | Methods and apparatus for using a configuration array similar to an associated data array | Tyler Thorp | 2010-11-30 |
| 7697329 | Methods and apparatus for using a configuration array similar to an associated data array | Tyler Thorp | 2010-04-13 |
| 7236023 | Apparatus and methods for adaptive trip point detection | Tyler Thorp, Mark G. Johnson | 2007-06-26 |
| 7149845 | Current mode logic scheme and circuit for matchline sense amplifier design using constant current bias cascode current mirrors | Kit Chan | 2006-12-12 |
| 5995404 | DRAM architecture with aligned data storage and bond pads | Masayuki Nakaumura, Takesada Akiba | 1999-11-30 |
| 5926422 | Integrated circuit memory device having current-mode data compression test mode | — | 1999-07-20 |
| 5886938 | Semiconductor memory device having sense amplifiers with offset latch transistors and interleaved gate fingers | — | 1999-03-23 |