Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12224002 | Pose estimation in extended reality systems | Wesley James HOLLAND, Mehrad Tavakoli, Injoon Hong, Huang-Chou Huang, Gerhard Reitmayr | 2025-02-11 |
| 12165550 | Reprojection optimization based on contextual brightness | Rakesh Raju CHENNA MADHAVUNI, Wesley James HOLLAND | 2024-12-10 |
| 11907138 | Multimedia compressed frame aware cache replacement policy | Hiral NANDU, Subbarao Palacharla, George Patsilaras, Alain Artieri, Vipul Gandhi +3 more | 2024-02-20 |
| 11682454 | Pose estimation in extended reality systems | Wesley James HOLLAND, Mehrad Tavakoli, Injoon Hong, Huang-Chou Huang, Gerhard Reitmayr | 2023-06-20 |
| 11256894 | Multi-stage biometric authentication | Wesley James HOLLAND, Rashmi Kulkarni, Ling Feng Huang, Huang-Chou Huang, Jeffrey Shabel +4 more | 2022-02-22 |
| 11232834 | Pose estimation in extended reality systems | Wesley James HOLLAND, Mehrad Tavakoli, Injoon Hong, Huang-Chou Huang, Gerhard Reitmayr | 2022-01-25 |
| 11132208 | System state management | Matthew Severson, Kangmin Lee, Cristian Duroiu, Steven J. Halter | 2021-09-28 |
| 11016898 | System and method for mixed tile-aware and tile-unaware traffic through a tile-based address aperture | Andrew E. Turner, George Patsilaras, Bohuslav Rychlik, Wesley James HOLLAND, Jeffrey Shabel | 2021-05-25 |
| 10761774 | Forced idling of memory subsystems | Olivier Alavoine, Sejoong Lee, Tauseef Kazi, Edoardo Regini, Renatas Jakushokas +9 more | 2020-09-01 |
| 10747671 | System and method for intelligent tile-based prefetching of image frames in a system on a chip | Wesley James HOLLAND, Bohuslav Rychlik, Andrew E. Turner, George Patsilaras, Jeffrey Shabel | 2020-08-18 |
| 10609418 | System and method for intelligent data/frame compression in a system on a chip | Serag Gadelrab, Chinchuan Andrew Chiu, Moinul Khan, Kyle John Ernewein, Tom Longo +2 more | 2020-03-31 |
| 10484685 | System and method for intelligent data/frame compression in a system on a chip | Serag Gadelrab, Chinchuan Andrew Chiu, Moinul Khan, Kyle John Ernewein, Tom Longo +3 more | 2019-11-19 |
| 10102031 | Bandwidth/resource management for multithreaded processors | Serag Gadelrab, Christopher Edward Koob, Aris Balatsos, Johnny Jone Wai Kuan, Myil RAMKUMAR +3 more | 2018-10-16 |
| 10019380 | Providing memory management functionality using aggregated memory management units (MMUs) | Serag Gadelrab, Jason Edward Podaima, Ruolong Liu, Alexander Miretsky, Paul Christopher John Wiercienski +4 more | 2018-07-10 |
| 9965220 | Forced idling of memory subsystems | Olivier Alavoine, Sejoong Lee, Tauseef Kazi, Edoardo Regini, Renatas Jakushokas +9 more | 2018-05-08 |
| 9465735 | System and method for uniform interleaving of data across a multiple-channel memory architecture with asymmetric storage capacity | Bohuslav Rychlik, Feng Wang, Anwar Rohillah | 2016-10-11 |
| 9064050 | Arbitrating bus transactions on a communications bus based on bus device health information and related power management | Cristian Duroiu, Jaya Prakash Subramaniam Ganasan, Vinod Chamarty, Mark Michael Schaffer, Joshua H. Stubbs +5 more | 2015-06-23 |