Issued Patents All Time
Showing 51–75 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8144509 | Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size | Seong-Ook Jung, Mehdi Hamidi Sani, Seung H. Kang | 2012-03-27 |
| 8139426 | Dual power scheme in memory circuit | Dongkyu Park | 2012-03-20 |
| 8134856 | Data protection scheme during power-up in spin transfer torque magnetoresistive random access memory | Seung H. Kang | 2012-03-13 |
| 8130535 | Flexible word-line pulsing for STT-MRAM | Hari M. Rao, Medhi Sani, Seung Duk Lee, Sung-Il Cho | 2012-03-06 |
| 8130534 | System and method to read and write data a magnetic tunnel junction element | Mohamed H. Abu-Rahma, Seung-Chul Song, Dongkyu Park, Cheng Zhong, Anosh B. Davierwalla | 2012-03-06 |
| 8107280 | Word line voltage control in STT-MRAM | Mehdi Hamidi Sani, Seung H. Kang | 2012-01-31 |
| 8102720 | System and method of pulse generation | Hari M. Rao, Anosh B. Davierwalla, Dongkyu Park | 2012-01-24 |
| 8082401 | Self-timing for a multi-ported memory system | Hari M. Rao, Chang Ho Jung, Nan Chen | 2011-12-20 |
| 8027206 | Bit line voltage control in spin transfer torque magnetoresistive random access memory | Seung H. Kang | 2011-09-27 |
| 8004880 | Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory | Seung H. Kang, Medi Hamidi Sani | 2011-08-23 |
| 7995378 | MRAM device with shared source line | Cheng Zhong, Dongkyu Park, Mohamed H. Abu-Rahma | 2011-08-09 |
| 7979832 | Process variation tolerant memory design | Seong-Ook Jung, Hyunwoo Nho | 2011-07-12 |
| 7936590 | Digitally-controllable delay for sense amplifier | Dongkyu Park, Anosh B. Davierwalla, Cheng Zhong, Mohamed H. Abu-Rahma | 2011-05-03 |
| 7929334 | In-situ resistance measurement for magnetic random access memory (MRAM) | Hari M. Rao, Xiaochun Zhu, Mohamed H. Abu-Rahma | 2011-04-19 |
| 7889585 | Balancing a signal margin of a resistance based memory circuit | Seong-Ook Jung, Jisu Kim, Jee-Hwan Song, Seung H. Kang, Mehdi Hamidi Sani | 2011-02-15 |
| 7882407 | Adapting word line pulse widths in memory systems | Mohamed H. Abu-Rahma | 2011-02-01 |
| 7813166 | Controlled value reference signal of resistance based memory circuit | Seong-Ook Jung, Jisu Kim, Jee-Hwan Song, Seung H. Kang | 2010-10-12 |
| 7764537 | Spin transfer torque magnetoresistive random access memory and design methods | Seong-Ook Jung, Seung H. Kang, Mehdi Hamidi Sani | 2010-07-27 |
| 7755964 | Memory device with configurable delay tracking | Seong-Ook Jung, Yi Han | 2010-07-13 |
| 7742329 | Word line transistor strength control for read and write in spin transfer torque magnetoresistive random access memory | Seung H. Kang, Medi Hamidi Sani | 2010-06-22 |
| 7710183 | CMOS level shifter circuit design | Ritu Chaba, Dongkyu Park, Changho Jung | 2010-05-04 |
| 7672175 | System and method of selectively applying negative voltage to wordlines during memory device read operation | Cheng Zhong, Dongkyu Park, Mohamed H. Abu-Rahma | 2010-03-02 |
| 7577785 | Content addressable memory with mixed serial and parallel search | Seong-Ook Jung | 2009-08-18 |
| 7512025 | Open digit line array architecture for a memory array | Charles L. Ingalls, David L. Pinney, Howard C. Kirsch | 2009-03-31 |
| 7345937 | Open digit line array architecture for a memory array | Charles L. Ingalls, David L. Pinney, Howard C. Kirsch | 2008-03-18 |