Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11424621 | Configurable redundant systems for safety critical applications | Rahul Gulati | 2022-08-23 |
| 11416049 | In-field monitoring of on-chip thermal, power distribution network, and power grid reliability | Rahul Gulati | 2022-08-16 |
| 10901020 | Digital duty-cycle monitoring of a periodic signal | Rahul Gulati, Edward Jacob MEISAROSH | 2021-01-26 |
| 10591965 | System and method for context-aware thermal management and workload scheduling in a portable computing device | Ronald Alton, Jon James Anderson, Mehdi Saeidi | 2020-03-17 |
| 10389379 | Error correcting code testing | Rahul Gulati, Pranjal Bhuyan, Mohammad Reza Kakoee | 2019-08-20 |
| 10141297 | Integrated device comprising device level cells with variable sizes for heat dissipation around hotspots | Mehdi Saeidi, Jon James Anderson, Chethan Swamynathan, Richard E. Wunderlich | 2018-11-27 |
| 10103714 | Adjust voltage for thermal mitigation | Manoj Mehrotra, Yuancheng Chris Pan, Shih-Hsin Jason Hu | 2018-10-16 |
| 10089194 | System and method for false pass detection in lockstep dual core or triple modular redundancy (TMR) systems | Virendra Bansal, Rahul Gulati | 2018-10-02 |
| 10042405 | Adjusting source voltage based on stored information | Manoj Mehrotra | 2018-08-07 |
| 9915968 | Systems and methods for adaptive clock design | Virendra Bansal, Manoj Mehrotra, Keith Alan Bowman | 2018-03-13 |
| 9897651 | Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications | Virendra Bansal, Rahul Gulati, Roberto Avanzi | 2018-02-20 |
| 9665680 | Cell-level signal electromigration | Sachin S. Sapatnekar, Vivek Mishra, Gracieli Posser, Ricardo Reis | 2017-05-30 |
| 9628089 | Supply voltage tracking clock generator in adaptive clock distribution systems | Keith Alan Bowman, Virendra Bansal | 2017-04-18 |
| 8786307 | Bias temperature instability-resistant circuits | — | 2014-07-22 |
| 8677303 | Electromigration compensation system | Young-Joon Park | 2014-03-18 |
| 8296701 | Method for designing a semiconductor device based on leakage current estimation | Ajoy Mandal, Arvind Nembili Veeravalli, Venkatasubramanyam Visvanathan | 2012-10-23 |
| 8255850 | Fabricating IC with NBTI path delay within timing constraints | Arvind Nembili Veeravalli, Ajoy Mandal | 2012-08-28 |
| 8219953 | Budgeting electromigration-related reliability among metal paths in the design of a circuit | Young-Joon Park, Srikanth Krishnan, Guru Prasad | 2012-07-10 |
| 8013635 | Multi-mode circuit and a method for preventing degradation in the multi-mode circuit | Nagaraj Savithri, Usha Narasimha | 2011-09-06 |
| 7791926 | SEU hardening circuit and method | — | 2010-09-07 |
| 7752582 | Method and apparatus for determining electro-migration in integrated circuit designs | Ajoy Mandal | 2010-07-06 |
| 7689377 | Technique for aging induced performance drift compensation in an integrated circuit | Hugh Mair | 2010-03-30 |