Issued Patents All Time
Showing 26–50 of 87 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9207943 | Real time multithreaded scheduler and scheduling method | Erich James Plondke | 2015-12-08 |
| 9201652 | Methods and apparatus for storage and translation of entropy encoded software embedded within a memory hierarchy | Sergei Larin, Anshuman Das Gupta | 2015-12-01 |
| 9147123 | System and method to perform feature detection and to determine a feature score | Mao Zeng, Erich James Plondke | 2015-09-29 |
| 9141544 | Cache memory with write through, no allocate mode | Manojkumar Pyla | 2015-09-22 |
| 9122486 | Bimodal branch predictor encoded in a branch instruction | Suresh K. Venkumahanti, Stephen Robert Shannon, Lin Wang, Phillip M. Jones, Daisy T. Palal +1 more | 2015-09-01 |
| 9116685 | Table call instruction for frequently called functions | Erich James Plondke, Charles Joseph Tabony, Ajay Anant Ingle, Suresh K. Venkumahanti, Evandro Menezes | 2015-08-25 |
| 8990543 | System and method for generating and using predicates within a single instruction packet | Robert A. Lester, Charles Joseph Tabony, Erich James Plondke, Mao Zeng, Suresh K. Venkumahanti +1 more | 2015-03-24 |
| 8972642 | Low latency two-level interrupt controller interface to multi-threaded processor | Suresh K. Venkumahanti, Erich James Plondke, Xufeng Chen, Peixin Zhong | 2015-03-03 |
| 8953893 | System and method to determine feature candidate pixels of an image | Mao Zeng, Erich James Plondke | 2015-02-10 |
| 8943293 | Configurable cache and method to configure same | Christopher Edward Koob, Ajay Anant Ingle, Jian Shen | 2015-01-27 |
| 8874884 | Selective writing of branch target buffer when number of instructions in cache line containing branch instruction is less than threshold | Suresh K. Venkumahanti, Suman Mamidi | 2014-10-28 |
| 8868888 | System and method of executing instructions in a multi-stage data processing pipeline | Ajay Anant Ingle, Suresh K. Venkumahanti | 2014-10-21 |
| 8855446 | Accelerated video compression multi-tap filter and bilinear interpolator | Bo Zhou, Mao Zeng, Junchen Du, Suhail Jalil | 2014-10-07 |
| 8843730 | Executing instruction packet with multiple instructions with same destination by performing logical operation on results of instructions and storing the result to the destination | Erich James Plondke, Mao Zeng, Charles Joseph Tabony, Suresh K. Venkumahanti | 2014-09-23 |
| 8812789 | Systems and methods for cache line replacement | Ajay Anant Ingle, Erich James Plondke | 2014-08-19 |
| 8756601 | Memory coherency acceleration via virtual machine migration | Erich James Plondke | 2014-06-17 |
| 8719503 | Configurable cache and method to configure same | Christopher Edward Koob, Ajay Anant Ingle, Jian Shen | 2014-05-06 |
| 8713286 | Register files for a digital signal processor operating in an interleaved multi-threaded environment | Muhammad Ahmed, Erich James Plondke, William C. Anderson | 2014-04-29 |
| 8656137 | Computer system with processor local coherency for virtualized input/output | Christopher Edward Koob, Erich James Plondke, Bryan C. Bayerdorffer | 2014-02-18 |
| 8656145 | Methods and systems for allocating interrupts in a multithreaded processor | Erich James Plondke | 2014-02-18 |
| 8639913 | Multi-mode register file for use in branch prediction | — | 2014-01-28 |
| 8631056 | Processor and method of determining a normalization count | Shankar Krithivasan, Erich James Plondke, Mao Zeng | 2014-01-14 |
| 8601234 | Configurable translation lookaside buffer | Erich James Plondke, Ajay Anant Ingle, Paul Bassett | 2013-12-03 |
| 8533530 | Method and system for trusted/untrusted digital signal processor debugging operations | William C. Anderson, Suresh K. Venkumahanti, Louis Achille Giannini, Manojkumar Pyla, Xufeng Chen | 2013-09-10 |
| 8464000 | Systems and methods for cache line replacements | Ajay Anant Ingle, Erich James Plondke | 2013-06-11 |