Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10388790 | FinFET with multilayer fins for multi-value logic (MVL) applications and method of forming | Min-hwa Chi, Ajey Poovannummoottil Jacob | 2019-08-20 |
| 10319854 | High voltage switching device | Simon Edward Willard, Alain Duvallet | 2019-06-11 |
| 10115787 | Low leakage FET | Simon Edward Willard, Alain Duvallet | 2018-10-30 |
| 9362277 | FinFET with multilayer fins for multi-value logic (MVL) applications and method of forming | Min-hwa Chi, Ajey Poovannummoottil Jacob | 2016-06-07 |
| 9219062 | Integrated circuits with improved source/drain contacts and methods for fabricating such integrated circuits | Peter M. Zeitzoff | 2015-12-22 |
| 9117930 | Methods of forming stressed fin channel structures for FinFET semiconductor devices | Vimal Kamineni, Derya Deniz, Abner Bello, Robert J. Miller, William J. Taylor, Jr. | 2015-08-25 |
| 9023705 | Methods of forming stressed multilayer FinFET devices with alternative channel materials | Ajey Poovannummoottil Jacob, Min-hwa Chi | 2015-05-05 |
| 8975142 | FinFET channel stress using tungsten contacts in raised epitaxial source and drain | Abner Bello, Vimal Kamineni, Derya Deniz | 2015-03-10 |
| 8889500 | Methods of forming stressed fin channel structures for FinFET semiconductor devices | Vimal Kamineni, Derya Deniz, Abner Bello, Robert J. Miller, William J. Taylor, Jr. | 2014-11-18 |