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Tsu-Jae King — 72 Patents

PTProgressant Technologies: 36 patents #1 of 3Top 35%
SYSynopsys: 17 patents #30 of 2,302Top 2%
University of California: 14 patents #328 of 18,278Top 2%
Xerox: 3 patents #3,111 of 8,622Top 40%
BUBoard Of Trustees Leland Stanford Jr University: 1 patents #50 of 153Top 35%
Santa Clara, CA: #111 of 9,301 inventorsTop 2%
California: #4,252 of 386,348 inventorsTop 2%
Overall (All Time): #27,714 of 4,157,543Top 1%
72 Patents All Time
Tsu-Jae King has been granted 72 US patents while listed as an inventor at Progressant Technologies. The first was granted in 1993 and the most recent in July 2014. Tsu-Jae King ranks #27,714 of 4,157,543 US inventors in our database (top 0.67%). Patent records list Tsu-Jae King in Santa Clara, CA, US.

Issued Patents All Time

Showing 1–25 of 72 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8786057 Integrated circuit on corrugated substrate Victor Moroz 2014-07-22 $9,007,000
8329559 Damascene process for use in fabricating semiconductor structures having micro/nano gaps Hideki Takeuchi, Emmanuel P. Quevy, Roger T. Howe 2012-12-11
8044442 Metal-insulator-metal (MIM) switching devices Hei Kam 2011-10-25
7960232 Methods of designing an integrated circuit on corrugated substrate Victor Moroz 2011-06-14 $2,204,000
7839710 Nano-electro-mechanical memory cells and devices Hei Kam 2010-11-23
7649230 Complementary field-effect transistors having enhanced performance with a single capping layer Kyoungsub Shin 2010-01-19
7629640 Two bit/four bit SONOS flash memory cell Min She 2009-12-08
7557009 Process for controlling performance characteristics of a negative differential resistance (NDR) device — 2009-07-07 $23,402,000
7528465 Integrated circuit on corrugated substrate Victor Moroz 2009-05-05 $24,575,000
7453083 Negative differential resistance field effect transistor for implementing a pull up element in a memory cell — 2008-11-18 $3,128,000
7265008 Method of IC production using corrugated substrate Victor Moroz 2007-09-04 $10,934,000
7266010 Compact static memory cell with non-volatile storage capability — 2007-09-04 $10,934,000
7256107 Damascene process for use in fabricating semiconductor structures having micro/nano gaps Hideki Takeuchi, Emmanuel P. Quevy, Roger T. Howe 2007-08-14
7254050 Method of making adaptive negative differential resistance device — 2007-08-07 $4,494,000
7247887 Segmented channel MOS transistor Victor Moroz 2007-07-24 $9,750,000
7220636 Process for controlling performance characteristics of a negative differential resistance (NDR) device — 2007-05-22 $15,305,000
7190050 Integrated circuit on corrugated substrate Victor Moroz 2007-03-13 $6,496,000
7186621 Method of forming a negative differential resistance device — 2007-03-06
7186619 Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET — 2007-03-06 $8,623,000
7187028 Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects — 2007-03-06 $8,623,000
7141858 Dual work function CMOS gate technology based on metal interdiffusion Igor Polishchuk, Pushkar Ranade, Chenming Hu 2006-11-28
7113423 Method of forming a negative differential resistance device — 2006-09-26
7109078 CMOS compatible process for making a charge trapping device David Liu 2006-09-19
7098472 Negative differential resistance (NDR) elements and memory device using the same — 2006-08-29
7095659 Variable voltage supply bias and methods for negative differential resistance (NDR) based memory device — 2006-08-22

Nearby-Ranked Inventors

Tetsuya Okamoto72
Qi Kong72
Miyeon Park72
Wen-Hao Cheng72
Noriaki Takagi72
Alex Anthony Tursi72
Calvin Yue-Ren Kuo72
Yong-geun Kim72
Shomir Ghosh72