Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › NAND flash memory integrated circuits and processes with controlled gate height

NAND flash memory integrated circuits and processes with controlled gate height

US Patent 9245898 · Granted Jan 26, 2016

Estimated economic value: $8,154,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Non-volatile memory with inter-die connection2025
Three-dimensional memory device with high contact via density and methods of for2025
Three-dimensional memory device with high contact via density and methods of for2025
Data latch programming algorithm for multi-bit-per-cell memory devices2025
Three-dimensional memory array with dual-level peripheral circuits and methods f2025
Transistor circuits including fringeless transistors and method of making the sa2024
Non-volatile memory with reduced word line switch area2024
Three-dimensional memory array with dual-level peripheral circuits and methods f2024
Non-volatile memory with efficient signal routing2024
Non-volatile memory with three dimensional stacked word line switches2024
Non-volatile memory with efficient word line hook-up2024
Transistor circuits including fringeless transistors and method of making the sa2023