Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods to prevent filler entrapment in microelectronic device to microelectronic substrate interconnection structures

Methods to prevent filler entrapment in microelectronic device to microelectronic substrate interconnection structures

US Patent 8999765 · Granted Apr 7, 2015

Estimated economic value: $25,687,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Microelectronics package comprising a package-on-package (PoP) architecture with2025
Through mold interconnect drill feature2025
Laser ablation-based surface property modification and contamination removal2025
Laser ablation-based surface property modification and contamination removal2025
Microelectronics package comprising a package-on-package (PoP) architecture with2025
Microelectronics package comprising a package-on-package (POP) architecture with2025
Open cavity bridge co-planar placement architectures and processes2024
Microelectronic component having molded regions with through-mold vias2024
Hydrophobic feature to control adhesive flow2024
Completely encapsulated optical multi chip package2024
Dummy die structures of a packaged integrated circuit device2024
Microelectronic structures including bridges2024