Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuit design checking for three dimensional chip technology

Circuit design checking for three dimensional chip technology

US Patent 8386977 · Granted Feb 26, 2013

Estimated economic value: $4,239,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Resist patterned redistribution wiring on copper polyimide via layer2025
Stacked semiconductor devices with topside and backside interconnect wiring2025
Buried power rail at tight cell-to-cell space2025
Dual redistribution layer structure2025
TSV and backside power distribution structure2025
Structure containing a via-to-buried power rail contact structure or a via-to-ba2025
Infrared debond damage mitigation by copper fill pattern2025
Sintering a nanoparticle paste for semiconductor chip join2025
Layered substrate structures with aligned optical access to electrical devices2024
Embedded microstrip transmission line2024
Substrate thinning for a backside power distribution network2024
Semiconductor device with early buried power rail (BPR) and backside power distr2024