Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods and systems for three-dimensional integrated circuit through hole via gapfill and overburden removal

Methods and systems for three-dimensional integrated circuit through hole via gapfill and overburden removal

US Patent 8323460 · Granted Dec 4, 2012

Estimated economic value: $6,751,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Resistive random access memory with preformed filaments2024
Zincating and doping of metal liner for liner passivation and adhesion improveme2024
Capping layer for a hafnium oxide-based ferroelectric material2024
Modifying ferroelectric properties of hafnium oxide with hafnium nitride layers2024
Metal liner passivation and adhesion enhancement by zinc doping2022
Electrochemical doping of thin metal layers employing underpotential deposition 2022
Metal liner passivation and adhesion enhancement by zinc doping2020
Selective electroless electrochemical atomic layer deposition in an aqueous solu2020
Method of sealing open pores on surface of porous dielectric material using iCVD2020
Layer-by-layer deposition using hydrogen2019
Electrochemical doping of thin metal layers employing underpotential deposition 2019
Self-forming barrier process2019