Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Atomic layer deposition processes for non-volatile memory devices

Atomic layer deposition processes for non-volatile memory devices

US Patent 8043907 · Granted Oct 25, 2011

Estimated economic value: $16,484,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Shadow ring lift to improve wafer edge performance2025
Low loss dielectric metasurface side mirrors for micro-LEDs2025
Process chamber shower head2025
Technologies for chip-to-chip optical data transfer background2025
Pseudo-monolithic data communication system2025
Thermal processing susceptor2025
Process chamber manifold2025
Graded superlattice structure for gate all around devices2025
Bottom cover plate to reduce wafer planar nonuniformity2025
Doping techniques2025
Substrate position calibration for substrate supports in substrate processing sy2025
Eco-efficiency monitoring and exploration platform for semiconductor manufacturi2025