Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Address sequencer within BIST (Built-in-Self-Test) system

Address sequencer within BIST (Built-in-Self-Test) system

US Patent 7010736 · Granted Mar 7, 2006

Estimated economic value: $15,826,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

PUF latch for OTP memory arrays and method of operation2020
MTP-Thyristor memory cell circuits and methods of operation2019
Protection circuit for integrated circuit die-let after scribe cut2019
First read countermeasures in memory2019
Low power voltage level shifter circuit2018
First read countermeasures in memory2018
MTP-thyristor memory cell circuits and methods of operation2017
Reduced power read sensing for one-time programmable memories2017
Partial local self boosting for NAND2016
MTP-thyristor memory cell circuits and methods of operation2016
Methods for adjusting the conductivity range of a nanotube fabric layer2015
Extending flash memory data retension via rewrite refresh2015