Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of fabricating a field effect transistor structure with abrupt source/drain junctions

Method of fabricating a field effect transistor structure with abrupt source/drain junctions

US Patent 6887762 · Granted May 3, 2005

Estimated economic value: $20,343,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Vertically spaced intra-level interconnect line metallization for integrated cir2025
Package architecture of photonic system with vertically stacked dies having plan2025
Gate-all-around integrated circuit structures having underlying dopant-diffusion2025
Source or drain structures with relatively high germanium content2025
Integrated circuit devices with angled transistors formed based on angled wafers2025
Integrated circuit structures having ultra-high conductivity global routing2025
Staircase-based metal-insulator-metal (MIM) capacitors2025
SRAM with P-type access transistors and complementary field-effect transistor te2025
Reduced contact resistivity with PMOS germanium and silicon doped with boron gat2025
Co-deposition of titanium and silicon for improved silicon germanium source and 2025
Co-integrated gallium nitride (GaN) and complementary metal oxide semiconductor 2025
Low germanium, high boron silicon rich capping layer for PMOS contact resistance2025