Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for in-situ testing of integrated circuit chips

Method and apparatus for in-situ testing of integrated circuit chips

US Patent 6414509 · Granted Jul 2, 2002

Estimated economic value: $11,850,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Low-stress thermal interface2025
Thick-silver layer interface2024
Die-substrate assemblies having sinter-bonded backside via structures and associ2023
Semiconductor dies having ultra-thin wafer backmetal systems, microelectronic de2023
Packaged dies with metal outer layers extending from die back sides toward die f2022
Power amplifier packages containing peripherally-encapsulated dies and methods f2021
Semiconductor dies having ultra-thin wafer backmetal systems, microelectronic de2021
Microelectronic components having integrated heat dissipation posts and systems 2020
Semiconductor device package and methods of manufacture thereof2020
Method of wafer dicing for wafers with backside metallization and packaged dies2020
Thick-silver layer interface2020
Reduction of entropic barrier of polyelectrolyte molecules in a nanopore device 2020