Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for processing a hardware independent user description to generate logic circuit elements including flip-flops, latches, and three-state buffers and combinations thereof

Method for processing a hardware independent user description to generate logic circuit elements including flip-flops, latches, and three-state buffers and combinations thereof

US Patent 5661661 · Granted Aug 26, 1997

Estimated economic value: $26,480,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Efficient statistical techniques for detecting sensitive data2024
Generative adversarial network for named entity recognition2023
Efficient statistical techniques for detecting sensitive data2023
Placement-based congestion-aware logic restructuring2019
Optimizing the ordering of the inputs to large commutative-associative trees of 2019
Path-based floorplan analysis2017
Shaping integrated with power network synthesis (PNS) for power grid (PG) alignm2016
Determining a set of timing paths for creating a circuit abstraction2016
Path-based floorplan analysis2015
Semiconductor integrated circuit partitioning and timing2015
Abstract creation2014
Displaying a congestion indicator for a channel in a circuit design layout2014