Brent Gregory — 18 Patents at Synopsys

Brent Gregory has been granted 18 US patents while listed as an inventor at Synopsys. The first was granted in 1996 and the most recent in May 2024. Brent Gregory ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Brent Gregory in Cupertino, CA, US.

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11983297	Efficient statistical techniques for detecting sensitive data	Aurelian Tutuianu, Daniel Voinea, Petru-Serban Cehan, Silviu Catalin Poede, Adrian Cadar +1 more	2024-05-14	$540,117,000
11797705	Generative adversarial network for named entity recognition	Daniel Voinea, Aurelian Tutuianu, Silviu Catalin Poede, Marian-Razvan Udrea	2023-10-24	$217,954,000
11599667	Efficient statistical techniques for detecting sensitive data	Aurelian Tutuianu, Daniel Voinea, Petru-Serban Cehan, Silviu Catalin Poede, Adrian Cadar +1 more	2023-03-07	$257,249,000
10346578	Placement-based congestion-aware logic restructuring	Jagat Patel, William C. Naylor	2019-07-09	$14,040,000
10331834	Optimizing the ordering of the inputs to large commutative-associative trees of logic gates	Bogdan Craciun, Jaime Wong, William C. Naylor	2019-06-25	$18,774,000
8146047	Automation method and system for assessing timing based on gaussian slack	William C. Naylor, Bogdan Craciun	2012-03-27	$6,043,000
7484194	Automation method and system for assessing timing based on Gaussian slack	William C. Naylor, Bogdan Craciun	2009-01-27	$7,568,000
6132109	Architecture and methods for a hardware description language source level debugging system	Trinanjan Chatterjee, Jing C. Lin, Srinivas Raghvendra, Emil Girczyc, Paul II Estrada +1 more	2000-10-17	$31,485,000
5953235	Method for processing a hardware independent user description to generate logic circuit elements including flip-flops, latches, and three-state buffers and combinations thereof	Russell B. Segal	1999-09-14	$56,531,000
5937190	Architecture and methods for a hardware description language source level analysis and debugging system	Trinanjan Chatterjee, Jing C. Lin, Srinivas Raghvendra, Emil Girczyc, Paul II Estrada +1 more	1999-08-10	$54,709,000
5870608	Method and apparatus for displaying text including context sensitive information derived from parse tree	—	1999-02-09	$48,309,000
5748488	Method for generating a logic circuit from a hardware independent user description using assignment conditions	Russell B. Segal	1998-05-05	$34,133,000
5737574	Method for generating a logic circuit from a hardware independent user description using mux conditions and hardware selectors	Russell B. Segal	1998-04-07	$26,913,000
5691911	Method for pre-processing a hardware independent description of a logic circuit	Russell B. Segal	1997-11-25	$31,725,000
5680318	Synthesizer for generating a logic network using a hardware independent description	Russell B. Segal	1997-10-21	$32,010,000
5661661	Method for processing a hardware independent user description to generate logic circuit elements including flip-flops, latches, and three-state buffers and combinations thereof	Russell B. Segal	1997-08-26	$26,480,000
5581781	Synthesizer for generating a logic network using a hardware independent description	Russell B. Segal	1996-12-03	$21,520,000
5530841	Method for converting a hardware independent user description of a logic circuit into hardware components	Russell B. Segal	1996-06-25	$21,206,000

Brent Gregory — 18 Patents

Issued Patents All Time

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