Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10650109 | Boolean satisfiability (SAT) solver | — | 2020-05-12 |
| 10346578 | Placement-based congestion-aware logic restructuring | Jagat Patel, Brent Gregory | 2019-07-09 |
| 10331834 | Optimizing the ordering of the inputs to large commutative-associative trees of logic gates | Bogdan Craciun, Brent Gregory, Jaime Wong | 2019-06-25 |
| 8146047 | Automation method and system for assessing timing based on gaussian slack | Brent Gregory, Bogdan Craciun | 2012-03-27 |
| 8069429 | Detailed placer for optimizing high density cell placement in a linear runtime | Ronald A. Miller, Yiu-Chung Wong | 2011-11-29 |
| 7484194 | Automation method and system for assessing timing based on Gaussian slack | Brent Gregory, Bogdan Craciun | 2009-01-27 |
| 7404168 | Detailed placer for optimizing high density cell placement in a linear runtime | Ronald A. Miller, Yiu-Chung Wong | 2008-07-22 |
| 7036103 | Detailed placer for optimizing high density cell placement in a linear runtime | Ronald A. Miller, Yiu-Chung Wong | 2006-04-25 |
| 6983431 | Simultaneous placement of large and small cells in an electronic circuit | Ross A. Donelly, Jason R. Woolever | 2006-01-03 |
| 6951003 | Placing cells of an IC design using partition preconditioning | Troy W. Barbee, III, Ross A. Donelly | 2005-09-27 |
| 6948143 | Constrained optimization with linear constraints to remove overlap among cells of an integrated circuit | Ross A. Donelly, Jason R. Woolever | 2005-09-20 |
| 6766500 | Multiple pass optimization for automatic electronic circuit placement | Ross A. Donelly, Michael Fu | 2004-07-20 |
| 6671859 | Non-linear optimization system and method for wire length and delay optimization for an automatic electronic circuit placer | Ross A. Donelly, Lu Sha | 2003-12-30 |
| 6665851 | Quick placement of electronic circuits using orthogonal one dimensional placements | Ross A. Donelly | 2003-12-16 |
| 6662348 | Non-linear optimization system and method for wire length and density within an automatic electronic circuit placer | Ross A. Donelly, Lu Sha | 2003-12-09 |
| 6384836 | Color gamut clipping | Kia Silverbrook | 2002-05-07 |
| 6301693 | Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer | Ross A. Donelly, Lu Sha | 2001-10-09 |
| 6282693 | Non-linear optimization system and method for wire length and density within an automatic electronic circuit placer | Ross A. Donelly, Lu Sha | 2001-08-28 |
| 5987219 | Method of producing a dither matrix by dividing an array into a plurality of regions and altering the borders of each region to have continuous irregular boundaries | Kia Silverbrook | 1999-11-16 |
| 5844532 | Color display system | Kia Silverbrook, Michael John Webb, David R. Brown, Natalie L. Kershaw, Mark Pulver +1 more | 1998-12-01 |
| 5832185 | Alteration of dither matrix size for full color dithering | Kia Silverbrook | 1998-11-03 |
| 5805136 | Intermingling subpixels in discrete level displays | Kia Silverbrook | 1998-09-08 |
| 5801854 | Color conversion method | — | 1998-09-01 |
| 5757516 | Noise quenching method and apparatus for a colour display system | — | 1998-05-26 |
| 5751272 | Display pixel balancing for a multi color discrete level display | Kia Silverbrook | 1998-05-12 |