Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Initializing a read pipeline of a non-volatile sequential memory device

Initializing a read pipeline of a non-volatile sequential memory device

US Patent 5604701 · Granted Feb 18, 1997

Estimated economic value: $28,520,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Shared source line memory architecture for flash cell byte-alterable high endura2021
EEPROM memory cell with low voltage read path and high voltage erase/write path2016
Resistive random access memory (ReRAM) and conductive bridging random access mem2016
Preventing unintended permanent write-protection2012
Method of programming an array of NMOS EEPROM cells that minimizes bit disturban2012
Method for programming and erasing an array of NMOS EEPROM cells that minimizes 2010
Method for programming and erasing an array of NMOS EEPROM cells that minimizes 2008
Anticollision protocol with fast read request and additional schemes for reading2006
Anticollision protocol with fast read request and additional schemes for reading2005
Method, system and apparatus for calibrating a pulse position modulation (PPM) d2004
Independently programmable memory segments within a PMOS electrically erasable p2003
Independently programmable memory segments within a PMOS electrically erasable p2001