Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Very thin embedded trace substrate-system in package (SIP)

Very thin embedded trace substrate-system in package (SIP)

US Patent 11309255 · Granted Apr 19, 2022

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device with discrete blocks2025
3D MIS-FO hybrid for embedded inductor package structure2025
Embedded resistor-capacitor film for fan out wafer level packaging2024
Embedded resistor-capacitor film for fan out wafer level packaging2024
Embedded resistor-capacitor film for fan out wafer level packaging2024
Multi-pin-wafer-level-chip-scale-packaging solution for high power semiconductor2024
Semiconductor device with discrete blocks2023
Single side modular 3D stack up SiP with mold cavity2023
Subsea safety node2023
Pillared cavity down MIS-SiP2022
Pillared cavity down MIS-SiP2022
Pillared cavity down MIS-SiP2022