Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8018738 | Voltage regulator attach for high current chip applications | Drew G. Doblar, Michael Bushue | 2011-09-13 |
| 7394260 | Tuning a test trace configured for capacitive coupling to signal traces | Margaret H. Wang | 2008-07-01 |
| 7296104 | Automated calibration of I/O over a multi-variable eye window | Brian L. Smith, Jue Wu, Jyh-Ming Jong, Wai Fong, Leo Yuan | 2007-11-13 |
| 7292020 | Remote DC-DC converter for high current, low voltage applications | Lawrence D. Smith, William H. Schwartz | 2007-11-06 |
| 6965648 | Source synchronous link integrity validation | Brian L. Smith | 2005-11-15 |
| 6944692 | Automated calibration of I/O over a multi-variable eye window | Brian L. Smith, Jue Wu, Jyh-Ming Jong, Wai Fong, Leo Yuan | 2005-09-13 |
| 6937680 | Source synchronous receiver link initialization and input floating control by clock detection and DLL lock detection | Wai Fong, Jyh-Ming Jong, Leo Yuan, Brian L. Smith | 2005-08-30 |
| 6737892 | Method and apparatus for detecting valid clock signals at a clock receiver circuit | Jyh-Ming Jong, Chung-Hsiao R. Wu, Leo Yuan | 2004-05-18 |
| 6542026 | Apparatus for on-chip reference voltage generator for receivers in high speed single-ended data link | Chung-Hsiao R. Wu, Jyh-Ming Jong, Leo Yuan | 2003-04-01 |
| 6521846 | Method for assigning power and ground pins in array packages to enhance next level routing | Michael C. Freda | 2003-02-18 |
| 6518792 | Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital signaling | Jyh-Ming Jong, Leo Yuan | 2003-02-11 |
| 5672911 | Apparatus to decouple core circuits power supply from input-output circuits power supply in a semiconductor device package | Sadanand R. Patil, Tai-Yu Chou | 1997-09-30 |