JJ

Jyh-Ming Jong

Oracle: 16 patents #615 of 14,854Top 5%
MI Mitac International: 5 patents #4 of 208Top 2%
Overall (All Time): #210,833 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7870413 Synchronization clocking scheme for small scalable multi-processor system Tomonori Hirai 2011-01-11
7764511 Multidirectional configurable architecture for multi-processor system Mario J.D. Lee, Tomonori Hirai 2010-07-27
7725742 Remote monitor module for power initialization of computer system Tomonori Hirai 2010-05-25
7656669 Scalable computer system and reconfigurable chassis module thereof Mario J.D. Lee, Tomonori Hirai 2010-02-02
7643286 Symmetric multiprocessing computer and star interconnection architecture and cooling system thereof Tomonori Hirai, Mario J.D. Lee 2010-01-05
7296104 Automated calibration of I/O over a multi-variable eye window Brian L. Smith, Jue Wu, Wai Fong, Leo Yuan, Prabhansu Chakrabarti 2007-11-13
7280589 Source synchronous I/O bus retimer Brian L. Smith 2007-10-09
7139308 Source synchronous bus repeater Drew G. Doblar, Brian L. Smith, Jurgen Schulz 2006-11-21
7130340 Noise margin self-diagnostic receiver logic Leo Yuan 2006-10-31
7039323 Optical transmitter for transmitting a plurality of output signals Drew G. Doblar, Daniel R. Cassiday 2006-05-02
6944692 Automated calibration of I/O over a multi-variable eye window Brian L. Smith, Jue Wu, Wai Fong, Leo Yuan, Prabhansu Chakrabarti 2005-09-13
6937680 Source synchronous receiver link initialization and input floating control by clock detection and DLL lock detection Wai Fong, Leo Yuan, Brian L. Smith, Prabhansu Chakrabarti 2005-08-30
6880118 System and method for testing operational transmissions of an integrated circuit Cecilia T. Chen, Wai Fong, Leo Yuan, Brian L. Smith 2005-04-12
6853594 Double data rate (DDR) data strobe receiver Chung-Hsiao R. Wu 2005-02-08
6737892 Method and apparatus for detecting valid clock signals at a clock receiver circuit Chung-Hsiao R. Wu, Prabhansu Chakrabarti, Leo Yuan 2004-05-18
6690191 Bi-directional output buffer Chung-Hsiao R. Wu 2004-02-10
6542026 Apparatus for on-chip reference voltage generator for receivers in high speed single-ended data link Chung-Hsiao R. Wu, Prabhansu Chakrabarti, Leo Yuan 2003-04-01
6518792 Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital signaling Prabhansu Chakrabarti, Leo Yuan 2003-02-11
6512704 Data strobe receiver Chung-Hsiao R. Wu, Lee A. Warner, Jurgen Schulz 2003-01-28
6504486 Dual voltage sense cell for input/output dynamic termination logic Derek Tsai, Leo Yuan 2003-01-07
6404839 Selectable clock divider circuit with a 50% duty cycle clock Wai Fong 2002-06-11