Issued Patents All Time
Showing 201–225 of 237 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6230230 | Elimination of traps and atomics in thread synchronization | William N. Joy, James M. O'Connor | 2001-05-08 |
| 6212604 | Shared instruction cache for multiple processors | — | 2001-04-03 |
| 6205543 | Efficient handling of a large register file for context switching | William N. Joy | 2001-03-20 |
| 6163837 | Writing of instruction results produced by instruction execution circuits to result destinations | Jeffrey Meng Wah Chan, Subramania Sudharsanan | 2000-12-19 |
| 6138210 | Multi-stack memory architecture | James M. O'Connor | 2000-10-24 |
| 6128721 | Temporary pipeline register file for a superpipelined superscalar processor | Robert Yung, William N. Joy | 2000-10-03 |
| 6125439 | Process of executing a method on a stack-based processor | James M. O'Connor | 2000-09-26 |
| 6101580 | Apparatus and method for assisting exact garbage collection by using a stack cache of tag bits | Ole Agesen, Steve Heller, Michael O'Connor, Guy L. Steele, Jr. | 2000-08-08 |
| 6098089 | Generation isolation system and method for garbage collection | James M. O'Connor, Sanjay Vishin | 2000-08-01 |
| 6092152 | Method for stack-caching method frames | James M. O'Connor | 2000-07-18 |
| 6076141 | Look-up switch accelerator and method of operating same | James M. O'Connor | 2000-06-13 |
| 6067602 | Multi-stack-caching memory architecture | James M. O'Connor | 2000-05-23 |
| 6065108 | Non-quick instruction accelerator including instruction identifier and data set storage and method of implementing same | James M. O'Connor | 2000-05-16 |
| 6058457 | Method for storing method frames in multiple stacks | James M. O'Connor | 2000-05-02 |
| 6042555 | Force-feedback interface device for the hand | James F. Kramer, Mark H. Yim, Daniel H. Gomez | 2000-03-28 |
| 6038643 | Stack management unit and method for a processor having a stack | James M. O'Connor | 2000-03-14 |
| 6026485 | Instruction folding for a stack-based machine | James M. O'Connor | 2000-02-15 |
| 6021469 | Hardware virtual machine instruction processor | James M. O'Connor, William N. Joy | 2000-02-01 |
| 6014723 | Processor with accelerated array access bounds checking | James M. O'Connor, William N. Joy | 2000-01-11 |
| 5970242 | Replicating code to eliminate a level of indirection during execution of an object oriented computer program | James M. O'Connor | 1999-10-19 |
| 5968157 | Locking of computer resources | William N. Joy, James M. O'Connor | 1999-10-19 |
| 5958042 | Grouping logic circuit in a pipelined superscalar processor | — | 1999-09-28 |
| 5953736 | Write barrier system and method including pointer-specific instruction variant replacement mechanism | James M. O'Connor, Sanjay Vishin | 1999-09-14 |
| 5925123 | Processor for executing instruction sets received from a network or from a local memory | James M. O'Connor | 1999-07-20 |
| D408156 | Clothes hanger | Stanley Eiley | 1999-04-20 |