Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10779194 | Preferred path network scheduling in multi-modem setup | Ralph Akram Gholmieh, Susheel Kumar Yadav Yadagiri, Siddharth Chitnis, Varun Tutpetkeshavamurthy, Bojun Pan +1 more | 2020-09-15 |
| 10609529 | Multi-modem scheduler for multimedia streams | Ralph Akram Gholmieh, Sivaramakrishna Veerepalli, Min Wang, Susheel Kumar Yadav Yadagiri, Varun Tutpetkeshavamurthy | 2020-03-31 |
| 10601710 | IP level multipath protocol | Ralph Akram Gholmieh, Susheel Kumar Yadav Yadagiri, Vaibhav Kumar, Siddharth Chitnis | 2020-03-24 |
| 10284475 | Distributed leaky bucket based multi-modem scheduler for multimedia streams | Ralph Akram Gholmieh, Sivaramakrishna Veerepalli, Min Wang, Susheel Kumar Yadav Yadagiri, Varun Tutpetkeshavamurthy | 2019-05-07 |
| 8725950 | Horizontally-shared cache victims in multiple core processors | — | 2014-05-13 |
| 8151268 | Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency | Darren M. Jones, Ryan C. Kinter, Michael Gottlieb Jensen | 2012-04-03 |
| 8037253 | Method and apparatus for global ordering to insure latency independent coherence | Thomas A. Petersen | 2011-10-11 |
| 8009090 | System and method for dynamic voltage scaling in a GPS receiver | Steve Gronemeyer | 2011-08-30 |
| 7853777 | Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructions | Darren M. Jones, Ryan C. Kinter, G. Michael Uhler | 2010-12-14 |
| 7774549 | Horizontally-shared cache victims in multiple core processors | — | 2010-08-10 |
| 7769957 | Preventing writeback race in multiple core processors | Adam Stoler | 2010-08-03 |
| 7752627 | Leaky-bucket thread scheduler in a multithreading microprocessor | Darren M. Jones, Ryan C. Kinter, Thomas A. Petersen | 2010-07-06 |
| 7739455 | Avoiding livelock using a cache manager in multiple core processors | Ryan C. Kinter | 2010-06-15 |
| 7721127 | Multithreaded dynamic voltage-frequency scaling microprocessor | Russell W. Bell | 2010-05-18 |
| 7664936 | Prioritizing thread selection partly based on stall likelihood providing status information of instruction operand register usage at pipeline stages | Michael Gottlieb Jensen, Darren M. Jones, Ryan C. Kinter | 2010-02-16 |
| 7657891 | Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency | Michael Gottlieb Jensen, Darren M. Jones, Ryan C. Kinter | 2010-02-02 |
| 7644237 | Method and apparatus for global ordering to insure latency independent coherence | Thomas A. Petersen | 2010-01-05 |
| 7594089 | Smart memory based synchronization controller for a multi-threaded multiprocessor SoC | Kevin D. Kissell, Darren M. Jones, Ryan C. Kinter | 2009-09-22 |
| 6311280 | Low-power memory system with incorporated vector processing | — | 2001-10-30 |
| 6219757 | Cache flush operation for a stack-based microprocessor | — | 2001-04-17 |
| 6178479 | Cycle-skipping DRAM for power saving | — | 2001-01-23 |
| 6098089 | Generation isolation system and method for garbage collection | James M. O'Connor, Marc Tremblay | 2000-08-01 |
| 5953736 | Write barrier system and method including pointer-specific instruction variant replacement mechanism | James M. O'Connor, Marc Tremblay | 1999-09-14 |
| 5930807 | Apparatus and method for fast filtering read and write barrier operations in garbage collection system | Zahir Ebrahim | 1999-07-27 |
| 5873104 | Bounded-pause time garbage collection system and method including write barrier associated with source and target instances of a partially relocated object | Marc Tremblay, James M. O'Connor, Guy L. Steele, Jr., Ole Agesen, Steven K. Heller +1 more | 1999-02-16 |