Robert Yung — 25 Patents at Oracle

Robert Yung has been granted 25 US patents while listed as an inventor at Oracle. The first was granted in 1995 and the most recent in May 2002. Robert Yung ranks #158,593 of 4,157,543 US inventors in our database (top 3.8%). Patent records list Robert Yung in Fremont, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6396504	Graphical image data reformatting method and apparatus	Carlan Joseph Beheler, Jaijiv Prabhakaran	2002-05-28	$38,116,000
6385713	Microprocessor with parallel inverse square root logic for performing graphics function on packed data elements	—	2002-05-07	$18,896,000
6304961	Computer system and method for fetching a next instruction	Kit S. Tam, Alfred Yeung, William N. Joy	2001-10-16	$59,319,000
6279099	Central processing unit with integrated graphics functions	Timothy J. Van Hook, Leslie D. Kohn	2001-08-21	$94,949,000
6205538	Instruction result labeling in a counterflow pipeline processor	—	2001-03-20	$263,768,000
6128721	Temporary pipeline register file for a superpipelined superscalar processor	William N. Joy, Marc Tremblay	2000-10-03	$279,930,000
5996066	Partitioned multiply and add/subtract instruction for CPU with integrated graphics functions	—	1999-11-30	$84,965,000
5956747	Processor having a plurality of pipelines and a mechanism for maintaining coherency among register values in the pipelines	Neil C. Wilhelm	1999-09-21	$84,680,000
5938756	Central processing unit with integrated graphics functions	Timothy J. Van Hook, Leslie D. Kohn	1999-08-17	$55,617,000
5931945	Graphic system for masking multiple non-contiguous bytes having decode logic to selectively activate each of the control lines based on the mask register bits	Leslie D. Kohn, Timothy J. Van Hook	1999-08-03	$38,918,000
5933157	Central processing unit with integrated graphics functions	Timothy J. Van Hook, Leslie D. Kohn	1999-08-03	$38,918,000
5918245	Microprocessor having a cache memory system using multi-level cache set prediction	—	1999-06-29	$118,617,000
5809324	Multiple instruction dispatch system for pipelined microprocessor without branch breaks	—	1998-09-15	$21,541,000
5761472	Interleaving block operations employing an instruction set capable of delaying block-store instructions related to outstanding block-load instructions in a computer system	Stephen K. Howell	1998-06-02	$10,217,000
5761475	Computer processor having a register file with reduced read and/or write port bandwidth	Neil C. Wilhelm	1998-06-02	$10,217,000
5752271	Method and apparatus for using double precision addressable registers for single precision data	—	1998-05-12	$23,398,000
5734874	Central processing unit with integrated graphics functions	Timothy J. Van Hook, Leslie D. Kohn	1998-03-31	$15,071,000
5727219	Virtual input/output processor utilizing an interrupt handler	Thomas L. Lyon, Sun Den Chen, William N. Joy, Leslie D. Kohn, Charles E. Narad	1998-03-10	$45,337,000
5721868	Rapid register file access by limiting access to a selectable register subset	William N. Joy, Michael R. Allen, Marc Tremblay	1998-02-24	$36,080,000
5717896	Method and apparatus for performing pipeline store instructions using a single cache access pipestage	Guillermo Maturana	1998-02-10	$169,580,000
5682493	Scoreboard table for a counterflow pipeline processor with instruction packages and result packages	Robert F. Sproull	1997-10-28	$58,814,000
5592679	Apparatus and method for distributed control in a processor architecture	—	1997-01-07	$35,830,000
5548739	Method and apparatus for rapidly retrieving data from a physically addressed data storage structure using address page crossing predictive annotations	—	1996-08-20	$45,182,000
5546554	Apparatus for dynamic register management in a floating point unit	Greg Williams, Huoy-Ming Yeh	1996-08-13	$28,061,000
5392414	Rapid data retrieval from data storage structures using prior access predictive annotations	—	1995-02-21	$16,578,000

Robert Yung — 25 Patents

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Issued Patents All Time

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