Issued Patents All Time
Showing 51–75 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9547596 | Handling of a wait for event operation within a data processing apparatus | — | 2017-01-17 |
| 9501667 | Security domain prediction | Thomas Christopher Grocutt | 2016-11-22 |
| 9430421 | Interrupt signal arbitration | Michael Alexander Kennedy, Andrew John Turner, Richard A. Lane | 2016-08-30 |
| 9383999 | Conditional compare instruction | David James Seal | 2016-07-05 |
| 9355014 | Debug instruction set allocation according to processor operating state | Michael John Williams, Richard Roy Grisenthwaite | 2016-05-31 |
| 9213828 | Data processing apparatus and method for protecting secure data and program code from non-secure access when switching between secure and less secure domains | Thomas Christopher Grocutt, Richard Roy Grisenthwaite | 2015-12-15 |
| 9201651 | Data processing apparatus and method having integer state preservation function and floating point state preservation function | — | 2015-12-01 |
| 9122890 | Secure mechanism to switch between different domains of operation in a data processor | Thomas Christopher Grocutt, Stuart David Biles | 2015-09-01 |
| 8966228 | Instruction fetching following changes in program flow | Chiloda Ashan Senerath Pathirane | 2015-02-24 |
| 8914616 | Exchanging physical to logical register mapping for obfuscation purpose when instruction of no operational impact is executed | — | 2014-12-16 |
| 8826079 | Data processing apparatus and method for identifying debug events | David Michael Gilday | 2014-09-02 |
| 8819378 | Data processing apparatus and method for performing memory transactions within such a data processing apparatus | — | 2014-08-26 |
| 8756377 | Area and power efficient data coherency maintenance | Antony John Penton, Loïc Pierron, Andrew Christopher Rose | 2014-06-17 |
| 8635406 | Data processing apparatus and method for providing target address information for branch instructions | Peter Richard Greenhalgh | 2014-01-21 |
| 8621336 | Error correction in a set associative storage device | Andrew Christopher Rose, Paul Stanley Hughes, Antony John Penton, Richard York, Simon Andrew Ford +2 more | 2013-12-31 |
| 8583897 | Register file with circuitry for setting register entries to a predetermined value | — | 2013-11-12 |
| 8572329 | Multi-region default memory map | Simon Axford, Paul Kimelman | 2013-10-29 |
| 8533685 | Processing apparatus, trace unit and diagnostic apparatus | John Michael Horley, Michael John Gibbs, Paul Anthony Gilkerson | 2013-09-10 |
| 8499017 | Apparatus and method for performing fused multiply add floating point operation | Antony John Penton, Ian Michael Caulfield | 2013-07-30 |
| 8356119 | Performance by reducing transaction request ordering requirements | Mittu Xavier Kocherry, Antony John Penton | 2013-01-15 |
| 8347067 | Instruction pre-decoding of multiple instruction sets | Peter Richard Greenhalgh, Andrew Christopher Rose | 2013-01-01 |
| 8291002 | Barrel shifter | — | 2012-10-16 |
| 8255629 | Method and apparatus with data storage protocols for maintaining consistencies in parallel translation lookaside buffers | Paul Gilbert Meyer, David Williamson | 2012-08-28 |
| 8086883 | Hardware driven processor state storage prior to entering a low power | Simon Axford | 2011-12-27 |
| 8015337 | Power efficient interrupt detection | Mittu Xavier Kocherry, Chiloda Ashan Senerath Pathirane, David Michael Gilday | 2011-09-06 |