Lordson L. Yue — 19 Patents at NVIDIA

Lordson L. Yue has been granted 19 US patents while listed as an inventor at NVIDIA. The first was granted in 1990 and the most recent in June 2024. Lordson L. Yue ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Lordson L. Yue in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12019498	Core off sleep mode with low exit latency	Thomas E. Dewey, Narayan Kulshrestha, Ramachandiran V, Sachin Satish Idgunji	2024-06-25	$3,728,089,000
11003238	Clock gating coupled memory retention circuit	Anand Shanmugam Sundararajan, Ramachandiran V, Abhijeet Chandratre, Archana Srinivasaiah, Sachin Satish Idgunji	2021-05-11	$985,869,000
8432406	Apparatus, system, and method for clipping graphics primitives with accelerated context switching	Vimal Parikh	2013-04-30	$8,372,000
7852341	Method and system for patching instructions in a shader for a 3-D graphics pipeline	Christian Rouet, Rui M. Bastos	2010-12-14	$10,181,000
7714877	Apparatus, system, and method for determining clipping distances	Vimal Parikh	2010-05-11	$35,464,000
7616218	Apparatus, system, and method for clipping graphics primitives	Vimal Parikh, Andrew Tao	2009-11-10	$6,697,000
7542046	Programmable clipping engine for clipping graphics primitives	Vimal Parikh, Andrew Tao	2009-06-02	$11,513,000
7490208	Architecture for compact multi-ported register file	John W. Berendsen, Karim M. Abdalla, Rui M. Bastos, Radoslav Danilak	2009-02-10	$23,988,000
7439988	Apparatus, system, and method for clipping graphics primitives with respect to a clipping plane	Vimal Parikh, Henry Packard Moreton	2008-10-21	$12,034,000
7420572	Apparatus, system, and method for clipping graphics primitives with accelerated context switching	Vimal Parikh	2008-09-02	$13,643,000
7292254	Apparatus, system, and method for clipping graphics primitives with reduced sensitivity to vertex ordering	Vimal Parikh, Andrew Tao	2007-11-06	$82,818,000
7224364	Optimal initial rasterization starting point	James T. Battle	2007-05-29
6581085	Approximation circuit and method	Parin Bhadrik Dalal, Avery Li-Chun Wang	2003-06-17	$16,693,000
6507886	Scheduler for avoiding bank conflicts in issuing concurrent requests to main memory	Andrea Chen	2003-01-14	$6,467,000
6393512	Circuit and method for detecting bank conflicts in accessing adjacent banks	Andrea Chen	2002-05-21	$5,574,000
6393534	Scheduler for avoiding bank conflicts in issuing concurrent requests to main memory	Andrea Chen	2002-05-21	$5,574,000
5036528	Self-calibrating clock synchronization system	Duc N. Le, Cirillo L. Costantino, David P. Chengson, Aurangzeb Khan	1991-07-30	$8,383,000
5034964	N:1 time-voltage matrix encoded I/O transmission system	Aurangzeb Khan, Robert W. Horst	1991-07-23	$16,906,000
4951050	2:1 Voltage matrix encoded I/O transmission system	Aurangzeb Khan	1990-08-21	$15,140,000

Lordson L. Yue — 19 Patents

Issued Patents All Time

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