Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12032840 | System level hardware mechanisms for dynamic assist control | Anand Shanmugam Sundararajan, Narayan Kulshrestha, Ka Yun Lee, Brian L. Smith, Madhukiran V. Swarna +1 more | 2024-07-09 |
| 12019498 | Core off sleep mode with low exit latency | Thomas E. Dewey, Narayan Kulshrestha, Sachin Satish Idgunji, Lordson L. Yue | 2024-06-25 |
| 11003238 | Clock gating coupled memory retention circuit | Anand Shanmugam Sundararajan, Abhijeet Chandratre, Lordson L. Yue, Archana Srinivasaiah, Sachin Satish Idgunji | 2021-05-11 |