Yi-Fu Chung — 13 Patents at Mosel Vitelic

Yi-Fu Chung has been granted 13 US patents while listed as an inventor at Mosel Vitelic. The first was granted in 2000 and the most recent in September 2009. Yi-Fu Chung ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list Yi-Fu Chung in Tainan, TW.

Patents per Year

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #	Title	Co-Inventors	Date
7592240	Method for forming a gate structure through an amorphous silicon layer and applications thereof	Jen-Chieh Chang, Shih-Chi Lai, Tun-Fu Hung	2009-09-22
7432204	Wafer and the manufacturing and reclaiming methods thereof	Jen-Chieh Chang, Pei-Feng Sun	2008-10-07
7375005	Method for reclaiming and reusing wafers	Jen-Chieh Chang, Shih-Chi Lai, Chih-Shin Tsai	2008-05-20
7282429	Method of manufacturing Schottky diode device	Shih-Chi Lai, Pei-Feng Sun, Jen-Chieh Chang	2007-10-16
7211523	Method for forming field oxide	Shih-Chi Lai, Jen-Chieh Chang	2007-05-01
7118971	Method for fabricating trench power device	Jen-Chieh Chang, Tun-Fu Hung	2006-10-10
6991994	Method of forming rounded corner in trench	Pei-Feng Sun, Jen-Chieh Chang	2006-01-31
6828196	Trench filling process for preventing formation of voids in trench	Pei-Feng Sun, Shih-Chi Lai, Mao-Song Tseng	2004-12-07
6709952	Method of forming a bottom oxide layer in a trench	Shih-Chi Lai, Jen-Chieh Chang, Ching-Chiu Chu	2004-03-23
6677216	Method of making IC capacitor	Chun-Pey Cho, Tsai-Sen Lin, Chou-Shin Jou, Chuan-Yi Wang, Jen-Chieh Chang +1 more	2004-01-13
6492248	Few-particle-induced low-pressure TEOS process	Jen-Chieh Chang, Ching-Cheng Hsieh, Pei-Feng Sun	2002-12-10
6117755	Method for planarizing the interface of polysilicon and silicide in a polycide structure	Sung Kun-Yu, Chien-Hung Chen, Kuang-Chao Chen	2000-09-12
6066529	Method for enlarging surface area of a plurality of hemi-spherical grains on the surface of a semiconductor chip	Ping-Wei Lin, Jui-Ping Li, Ming-Kuan Kao	2000-05-23