Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9607121 | Cascode CMOS structure | Fu-Lung Hsueh, Chih-Ping Chao, Chewn-Pu Jou, Yung-Chow Peng, Harry-Hak-Lay Chuang | 2017-03-28 |
| 8847321 | Cascode CMOS structure | Fu-Lung Hsueh, Chih-Ping Chao, Chewn-Pu Jou, Yung-Chow Peng, Harry-Hak-Lay Chuang | 2014-09-30 |
| 8217469 | Contact implement structure for high density design | Yung-Chin Hou, Yuh-Jier Mii, Li-Chun Tien | 2012-07-10 |
| 6469341 | Method and device for producing undercut gate for flash memory | Ray C. Lee | 2002-10-22 |
| 6440796 | Poly spacer split gate cell with extremely small cell size | — | 2002-08-27 |
| 6414350 | EPROM cell having a gate structure with dual side-wall spacers of differential composition | Tsong-Minn Hsieh | 2002-07-02 |
| 6365455 | Flash memory process using polysilicon spacers | Wen-Doe Su, Thomas Chang, Mao-Song Tseng, Shih-Chi Lai, Kun-Yu Sung +1 more | 2002-04-02 |
| 6352897 | Method of improving edge recess problem of shallow trench isolation | — | 2002-03-05 |
| 6331721 | Memory cell with built in erasure feature | Wen-Ting Chu, Huoy-Jong Wu | 2001-12-18 |
| 6265754 | Covered slit isolation between integrated circuit devices | — | 2001-07-24 |
| 6261903 | Floating gate method and device | A. J. Chang | 2001-07-17 |
| 6255205 | High density programmable read-only memory employing double-wall spacers | — | 2001-07-03 |
| 6242774 | Poly spacer split gate cell with extremely small cell size | — | 2001-06-05 |
| 6238977 | Method for fabricating a nonvolatile memory including implanting the source region, forming the first spacers, implanting the drain regions, forming the second spacers, and forming a source line on the source and second spacers | — | 2001-05-29 |
| 6194269 | Method to improve cell performance in split gate flash EEPROM | Huoy-Jong Wu | 2001-02-27 |
| 6194272 | Split gate flash cell with extremely small cell size | — | 2001-02-27 |
| 6184093 | Method of implementing differential gate oxide thickness for flash EEPROM | — | 2001-02-06 |
| 6171927 | Device with differential field isolation thicknesses and related methods | Yuru Chu | 2001-01-09 |
| 6165843 | Covered slit isolation between integrated circuit devices | — | 2000-12-26 |
| 6136653 | Method and device for producing undercut gate for flash memory | Ray C. Lee | 2000-10-24 |
| 6136647 | Method of forming interpoly dielectric and gate oxide in a memory cell | — | 2000-10-24 |
| 6121116 | Flash memory device isolation method and structure | — | 2000-09-19 |
| 6110796 | Method of improving junction leakage problem of shallow trench isolation by covering said STI with an insulating layer during salicide process | — | 2000-08-29 |
| 6093627 | Self-aligned contact process using silicon spacers | — | 2000-07-25 |
| 6083792 | Manufacturing process of a split gate flash memory unit | — | 2000-07-04 |