Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11166383 | Resin-clad copper foil, copper-clad laminated plate, and printed wiring board | Yoshihiro Yoneda, Toshifumi Matsushima, Toshihiro Hosoi | 2021-11-02 |
| 10863621 | Metal foil with releasing resin layer, and printed wiring board | Toshifumi Matsushima, Ayumu Tateoka, Shigeru Itabashi | 2020-12-08 |
| 10524360 | Copper clad laminate for forming of embedded capacitor layer, multilayered printed wiring board, and manufacturing method of multilayered printed wiring board | Toshifumi Matsushima, Toshihiro Hosoi | 2019-12-31 |
| 10244640 | Copper clad laminate provided with protective layer and multilayered printed wiring board | Toshifumi Matsushima, Toshihiro Hosoi, Ayumu Tateoka | 2019-03-26 |
| 9924597 | Copper clad laminate for forming of embedded capacitor layer, multilayered printed wiring board, and manufacturing method of multilayered printed wiring board | Toshifumi Matsushima, Toshihiro Hosoi | 2018-03-20 |
| 8866018 | Passive electrical devices and methods of fabricating passive electrical devices | Pranabes K. Pramanik, Yuji Kageyama, Jin Hyun Hwang | 2014-10-21 |
| 6905757 | DIELECTRIC FILLER CONTAINING RESIN FOR USE IN FORMATION OF BUILT-IN CAPACITOR LAYER OF PRINTED WIRING BOARD AND DOUBLE-SIDED COPPER CLAD LAMINATE WITH DIELECTRIC LAYER FORMED USING THE SAME DIELECTRIC FILLER CONTAINING RESIN, AND PRODUCTION METHOD OF DOUBLE-SIDED COPPER CLAD LAMINATE | Toshifumi Matsushima, Hideaki Miwa, Akira Ichiryu, Kazuhiro Yamazaki, Tetsuro Sato | 2005-06-14 |
| 6884944 | Multi-layer printed wiring boards having blind vias | — | 2005-04-26 |
| 6693793 | Double-sided copper clad laminate for capacitor layer formation and its manufacturing method | Kazuhiro Yamazaki, Toshifumi Matsushima | 2004-02-17 |
| 6551433 | Method for producing copper-clad laminate | Tomohiro Ishino | 2003-04-22 |
| 6240636 | Method for producing vias in the manufacture of printed circuit boards | Tsutomu Asai, Shinichi Obata | 2001-06-05 |
| 6107003 | Method for producing multi-layer printed wiring boards having blind vias | — | 2000-08-22 |