Issued Patents All Time
Showing 26–50 of 90 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6288956 | Semiconductor device having test function | Tetsushi Tanizaki, Tetsuo Kato, Mikio Asakura, Takayuki Miyamoto | 2001-09-11 |
| 6170036 | Semiconductor memory device and data transfer circuit for transferring data between a DRAM and a SRAM | Katsumi Dosaka, Kouji Hayano, Masaki Kumanoya, Akira Yamazaki, Hisashi Iwamoto | 2001-01-02 |
| 6157992 | Synchronous semiconductor memory having read data mask controlled output circuit | Seiji Sawada | 2000-12-05 |
| RE36875 | Semiconductor memory device capable of performing test mode operation and method of operating such semiconductor device | Hisashi Iwamoto, Masaki Kumanoya, Katsumi Dosaka, Akira Yamazaki | 2000-09-19 |
| 6026029 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 2000-02-15 |
| 5946266 | Synchronous semiconductor memory device capable of reducing delay time at data input/output line upon data input | Hisashi Iwamoto | 1999-08-31 |
| 5880998 | Synchronous semiconductor memory device in which current consumed by input buffer circuit is reduced | Masaaki Tanimura | 1999-03-09 |
| 5867446 | Synchronous semiconductor memory device | Takayuki Miyamoto, Takeshi Kajimoto, Hisashi Iwamoto | 1999-02-02 |
| 5848004 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 1998-12-08 |
| 5844859 | Synchronous semiconductor memory device reliably fetching external signal in synchronization with clock signal periodically supplied from the exterior | Hisashi Iwamoto | 1998-12-01 |
| 5818768 | Operation mode setting circuit in semiconductor device | Seiji Sawada | 1998-10-06 |
| 5815462 | Synchronous semiconductor memory device and synchronous memory module | Hisashi Iwamoto, Takashi Araki, Yasumitsu Murai, Seiji Sawada | 1998-09-29 |
| 5805603 | Synchronous semiconductor memory device realizing high speed and accurate operation | Takashi Araki, Hisashi Iwamoto | 1998-09-08 |
| 5796669 | Synchronous semiconductor memory device | Takashi Araki, Hisashi Iwamoto | 1998-08-18 |
| 5764584 | Multi-bank synchronous semiconductor memory device | Takahiko Fukiage, Mikio Sakurai | 1998-06-09 |
| 5764590 | Synchronous semiconductor memory device which allows switching of bit configuration | Hisashi Iwamoto | 1998-06-09 |
| 5731727 | Voltage control type delay circuit and internal clock generation circuit using the same | Hisashi Iwamoto | 1998-03-24 |
| 5708611 | Synchronous semiconductor memory device | Hisashi Iwamoto | 1998-01-13 |
| 5652723 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 1997-07-29 |
| 5650968 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 1997-07-22 |
| 5629895 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 1997-05-13 |
| 5629897 | Synchronous semiconductor memory device having a mode requiring an internal clock signal and a mode not requiring the internal clock signal | Hisashi Iwamoto | 1997-05-13 |
| 5623454 | Semiconductor memory device | Katsumi Dosaka, Masaki Kumanoya, Kouji Hayano, Akira Yamazaki, Hisashi Iwamoto +4 more | 1997-04-22 |
| 5603009 | Semiconductor memory device including a data transfer circuit for transferring data between a DRAM and an SRAM | Katsumi Dosaka, Kouji Hayano, Masaki Kumanoya, Akira Yamazaki, Hisashi Iwamoto | 1997-02-11 |
| 5594704 | Synchronous semiconductor memory device | Takayuki Miyamoto, Takeshi Kajimoto, Hisashi Iwamoto | 1997-01-14 |