TN

Takayuki Nakagawa

Mitsubishi Electric: 24 patents #727 of 25,717Top 3%
HI Hitachi: 13 patents #3,142 of 28,497Top 15%
IC Idemitsu Petrochemical Co.: 1 patents #305 of 578Top 55%
KT Kabushiki Kaisha Toshiba: 1 patents #13,537 of 21,451Top 65%
MK Mitusbishi Denki Kabushiki Kaisha: 1 patents #2 of 21Top 10%
NE Nec: 1 patents #7,889 of 14,502Top 55%
OC Oki Electric Cable Co.: 1 patents #10 of 36Top 30%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
SO Sony: 1 patents #17,262 of 25,231Top 70%
HE Hitachi Vlsi Engineering: 1 patents #390 of 666Top 60%
Overall (All Time): #68,811 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 26–43 of 43 patents

Patent #TitleCo-InventorsDate
6580049 Electric discharge machining method and device Hidetaka Katougi 2003-06-17
6505091 Method and apparatus for electrodischarge machining Yoshihito Imai, Takashi Yuzawa 2003-01-07
6423782 Propylene copolymer and molded object obtained by molding the copolymer Shinichi Yukimasa, Masahiko Endo, Masato Kijima 2002-07-23
6385501 Electric discharge machining control method and electric discharge machining controller Yoshihito Imai, Takashi Yuzawa 2002-05-07
5822605 Parallel processor system with a broadcast message serializing circuit provided within a network Tatsuo Higuchi, Tadaaki Isobe, Junji Nakagoshi, Shigeo Takeuchi, Tatsuru Toba +3 more 1998-10-13
5701434 Interleave memory controller with a common access queue 1997-12-23
5682480 Parallel computer system for performing barrier synchronization by transferring the synchronization packet through a path which bypasses the packet buffer in response to an interrupt 1997-10-28
5051941 Method and apparatus for logical simulation Yoshio Takamine, Shunsuke Miyamoto, Yoshiharu Kazama, Yoshiaki Kinoshita 1991-09-24
4910667 Vector processor with vector buffer memory for read or write of vector data between vector storage and operation unit Teruo Tanaka, Koichiro Omoda, Yasuhiro Inagami, Mamoru Sugie, Shigeo Nagashima 1990-03-20
4899273 Circuit simulation method with clock event suppression for debugging LSI circuits Koichiro Omoda, Shunsuke Miyamoto, Yoshio Takamine, Shigeo Nagashima, Masayuki Miyoshi +2 more 1990-02-06
4881168 Vector processor with vector data compression/expansion capability Yasuhiro Inagami, Yoshiko Tamaki, Shigeo Nagashima 1989-11-14
4825361 Vector processor for reordering vector data during transfer from main memory to vector registers Koichiro Omoda, Shunichi Torii, Shigeo Nagashima, Yasuhiro Inagami 1989-04-25
4811213 Vector processor with vector registers Yoshio Takamine, Yoshiharu Kazama, Yoshiaki Kinoshita, Shunsuke Miyamoto 1989-03-07
4803620 Multi-processor system responsive to pause and pause clearing instructions for instruction execution control Yasuhiro Inagami, Shigeo Nagashima 1989-02-07
4792893 Selectively recursive pipelined parallel vector logical operation system Koichiro Omoda 1988-12-20
4782441 Vector processor capable of parallely executing instructions and reserving execution status order for restarting interrupted executions Yasuhiro Inagami, Shigeo Nagashima, Koichiro Omoda, Teruo Tanaka 1988-11-01
4773006 Vector operation designator Yoshiaki Kinoshita, Yoshiharu Kazama, Shunsuke Miyamoto, Koichiro Omoda 1988-09-20
4508813 Method for producing negative resist images 1985-04-02