Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5051941 | Method and apparatus for logical simulation | Yoshio Takamine, Shunsuke Miyamoto, Takayuki Nakagawa, Yoshiaki Kinoshita | 1991-09-24 |
| 4995037 | Adjustment method and apparatus of a computer | Toyohisa Imada | 1991-02-19 |
| 4933839 | Vector processor | Yoshiaki Kinoshita, Yoshio Takamine | 1990-06-12 |
| 4922445 | Logic circuit simulation method | Yoshito Mizoue | 1990-05-01 |
| 4899273 | Circuit simulation method with clock event suppression for debugging LSI circuits | Koichiro Omoda, Shunsuke Miyamoto, Takayuki Nakagawa, Yoshio Takamine, Shigeo Nagashima +2 more | 1990-02-06 |
| 4897801 | Display terminal equipment with concurrently operable plural input devices | Motonobu Nagafuji | 1990-01-30 |
| 4811213 | Vector processor with vector registers | Yoshio Takamine, Takayuki Nakagawa, Yoshiaki Kinoshita, Shunsuke Miyamoto | 1989-03-07 |
| 4773006 | Vector operation designator | Yoshiaki Kinoshita, Shunsuke Miyamoto, Koichiro Omoda, Takayuki Nakagawa | 1988-09-20 |