Issued Patents All Time
Showing 1–25 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6044450 | Processor for VLIW instruction | Yuji Tsushima, Yoshikazu Tanaka, Yoshiko Tamaki, Masanao Ito, Kentaro Shimada +1 more | 2000-03-28 |
| 5517619 | Interconnection network and crossbar switch for the same | Akira Muramatsu, Ikuo Yoshihara, Kazuo Nakao, Takehisa Hayashi, Teruo Tanaka | 1996-05-14 |
| 5465380 | Data transfer method of transferring data between programs of a same program group in different processors using unique identifiers of the programs | Naoki Hamanaka, Teruo Tanaka, Koichiro Omoda | 1995-11-07 |
| 5339396 | Interconnection network and crossbar switch for the same | Akira Muramatsu, Ikuo Yoshihara, Kazuo Nakao, Takehisa Hayashi, Teruo Tanaka | 1994-08-16 |
| 5301322 | System for converting job/process identifiers into processor/process identifiers in transferring data between processes in a multiprocessor system | Naoki Hamanaka, Teruo Tanaka, Koichiro Omoda | 1994-04-05 |
| 5295252 | Data storage device | Shunichi Torii, Koichiro Omoda | 1994-03-15 |
| 5257067 | Apparatus for placing film mask in contact with object | Haruo Sakamoto, Katuya Sangu | 1993-10-26 |
| 5113390 | Data transfer network suitable for use in a parallel computer | Takehisa Hayashi, Koichiro Omoda, Teruo Tanaka, Naoki Hamanaka | 1992-05-12 |
| 5086498 | Parallel computer with asynchronous communication facility | Teruo Tanaka, Naoki Hamanaka, Junji Nakagoshi, Koichiro Omoda | 1992-02-04 |
| 5043873 | Method of parallel processing for avoiding competition control problems and data up dating problems common in shared memory systems | Akira Muramatsu, Kousuke Sakoda, Ikuo Yoshihara, Kazuo Nakao, Makoto Nohmi +2 more | 1991-08-27 |
| 5010477 | Method and apparatus for transferring vector data between parallel processing system with registers & logic for inter-processor data communication independents of processing operations | Koichiro Omoda, Teruo Tanaka, Junji Nakagoshi, Naoki Hamanaka | 1991-04-23 |
| 4992936 | Address translation method and apparatus therefor | Hisashi Katada, Yasuhiro Inagami, Yoshiko Tamaki | 1991-02-12 |
| 4985827 | Computer for synchronized read and write of vector data | Naoki Hamanaka, Teruo Tanaka, Koichiro Omoda, Junji Nakagoshi, Kazuo Ojima | 1991-01-15 |
| 4951193 | Parallel computer with distributed shared memories and distributed task activating circuits | Akira Muramatsu, Kousuke Sakoda, Ikuo Yoshihara, Kazuo Nakao, Makoto Nohmi +2 more | 1990-08-21 |
| 4918686 | Data transfer network suitable for use in a parallel computer | Takehisa Hayashi, Koichiro Omada, Teruo Tanaka, Naoki Hamanaka | 1990-04-17 |
| 4910667 | Vector processor with vector buffer memory for read or write of vector data between vector storage and operation unit | Teruo Tanaka, Koichiro Omoda, Yasuhiro Inagami, Takayuki Nakagawa, Mamoru Sugie | 1990-03-20 |
| 4899273 | Circuit simulation method with clock event suppression for debugging LSI circuits | Koichiro Omoda, Shunsuke Miyamoto, Takayuki Nakagawa, Yoshio Takamine, Masayuki Miyoshi +2 more | 1990-02-06 |
| 4881168 | Vector processor with vector data compression/expansion capability | Yasuhiro Inagami, Takayuki Nakagawa, Yoshiko Tamaki | 1989-11-14 |
| 4825361 | Vector processor for reordering vector data during transfer from main memory to vector registers | Koichiro Omoda, Shunichi Torii, Yasuhiro Inagami, Takayuki Nakagawa | 1989-04-25 |
| 4809161 | Data storage device | Shunichi Torii, Koichiro Omoda | 1989-02-28 |
| 4803620 | Multi-processor system responsive to pause and pause clearing instructions for instruction execution control | Yasuhiro Inagami, Takayuki Nakagawa | 1989-02-07 |
| 4782441 | Vector processor capable of parallely executing instructions and reserving execution status order for restarting interrupted executions | Yasuhiro Inagami, Koichiro Omoda, Takayuki Nakagawa, Teruo Tanaka | 1988-11-01 |
| 4768146 | Vector data refer circuit with a preceding paging control for a vector processor apparatus therefor | Koichiro Omoda, Yasuhiro Inagami | 1988-08-30 |
| 4760545 | Vector processing apparatus including vector registers having selectively accessible storage locations | Yasuhiro Inagami | 1988-07-26 |
| 4734850 | Data process system including plural storage means each capable of concurrent and intermediate reading and writing of a set of data signals | Shunichi Torii, Koichiro Omoda | 1988-03-29 |