Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6430651 | Memory device for constituting a memory subsystem of a data processing apparatus | — | 2002-08-06 |
| 6336190 | Storage apparatus | Toshihiro Yamagishi | 2002-01-01 |
| 6266735 | Information processing system | — | 2001-07-24 |
| 6263406 | Parallel processor synchronization and coherency control method and system | Kohki Uwano, Shigeko Hashimoto, Naonobu Sukegawa, Miki Miyaki, Tatsuya Ichiki | 2001-07-17 |
| 6119199 | Information processing system | — | 2000-09-12 |
| 6119150 | Message passing distributed shared memory system that eliminates unnecessary software controlled cache flushes or purges | Hiroaki Fujii, Makoto Koga, Hideya Akashi | 2000-09-12 |
| 6078623 | Data transmission apparatus and method | Bunichi Fujita | 2000-06-20 |
| 5968135 | Processing instructions up to load instruction after executing sync flag monitor instruction during plural processor shared memory store/load access synchronization | Yasuhiro Teramoto, Toshimitsu Andoh, Naonobu Sukegawa, Yuko ISHIBASHI | 1999-10-19 |
| 5857110 | Priority control with concurrent switching of priorities of vector processors, for plural priority circuits for memory modules shared by the vector processors | Tadayuki Sakakibara, Teruo Tanaka, Katsuyoshi Kitai, Shigeko Hashimoto, Yasuhiro Inagami +1 more | 1999-01-05 |
| 5822329 | Data-transmitter-receiver | Kazunori Nakajima, Noboru Masuda, Masamori Kashiyama, Bunichi Fujita, Masakazu Yamamoto | 1998-10-13 |
| 5822605 | Parallel processor system with a broadcast message serializing circuit provided within a network | Tatsuo Higuchi, Junji Nakagoshi, Shigeo Takeuchi, Tatsuru Toba, Yoshiko Yasuda +3 more | 1998-10-13 |
| 5787301 | Parallel computer system | Osamu Arakawa, Toshimitsu Ando, Masato Ishii, Shigeo Takeuchi | 1998-07-28 |
| 5729550 | Data transmitter-receiver | Kazunori Nakajima, Noboru Masuda, Masamori Kashiyama, Bunichi Fujita, Masakazu Yamamoto | 1998-03-17 |
| 5617575 | Interprocessor priority control system for multivector processor | Tadayuki Sakakibara, Teruo Tanaka, Katsuyoshi Kitai, Shigeko Hashimoto, Yasuhiro Inagami +1 more | 1997-04-01 |
| 5602781 | Memory device having a plurality of sets of data buffers | — | 1997-02-11 |
| 5475849 | Memory control device with vector processors and a scalar processor | Toshimitsu Ando, Tsuguo Matsuura | 1995-12-12 |
| 5432920 | Store control method with hierarchic priority scheme for computer system | Shigeko Yazawa, Mihoko Hashiba, Katsuyoshi Kitai | 1995-07-11 |
| 5392443 | Vector processor with a memory assigned with skewed addresses adapted for concurrent fetching of a number of vector elements belonging to the same vector data | Tadayuki Sakakibara, Katsuyoshi Kitai, Yasuhiro Inagami, Yoshiko Tamaki, Teruo Tanaka +2 more | 1995-02-21 |
| 5367654 | Method and apparatus for controlling storage in computer system utilizing forecasted access requests and priority decision circuitry | Masao Furukawa, Shigeko Yazawa | 1994-11-22 |
| 5293602 | Multiprocessor computer system with dedicated synchronizing cache | Masakazu Fukagawa | 1994-03-08 |
| 5060148 | Control system for vector processor with serialization instruction for memory accesses for pipeline operation | Toshiko Isobe | 1991-10-22 |
| 4843543 | Storage control method and apparatus | — | 1989-06-27 |