Issued Patents All Time
Showing 51–75 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5012447 | Bit line structure for a dynamic type semiconductor memory device | Yoshio Matsuda | 1991-04-30 |
| 4980310 | Method of making a trench dram cell | Yoshio Matsuda | 1990-12-25 |
| 4977542 | Dynamic semiconductor memory device of a twisted bit line system having improved reliability of readout | Yoshio Matsuda, Tsukasa Ooishi, Kazutami Arimoto, Masaki Tsukude | 1990-12-11 |
| 4972380 | Decoding circuit for functional block | Hideto Hidaka, Yoshio Matsuda | 1990-11-20 |
| 4953164 | Cache memory system having error correcting circuit | Mikio Asakura, Yoshio Matsuda | 1990-08-28 |
| 4926385 | Semiconductor memory device with cache memory addressable by block within each column | Hideto Hidaka, Mikio Asakura, Yoshio Matsuda | 1990-05-15 |
| 4918692 | Automated error detection for multiple block memory array chip and correction thereof | Hideto Hidaka, Yoshio Matsuda | 1990-04-17 |
| 4914632 | Semiconductor devices having redundancy circuitry and operating method therefor | Yoshio Matsuda, Mikio Asakura | 1990-04-03 |
| 4914630 | Refresh arrangement in a block divided memory including a plurality of shift registers | Yoshio Matsuda, Hideto Hidaka | 1990-04-03 |
| 4903268 | Semiconductor memory device having on-chip error check and correction functions | Hideto Hidaka, Masaki Kumanoya, Hideshi Miyatake, Katsumi Dosaka, Tsutomu Yoshihara | 1990-02-20 |
| 4896297 | Circuit for generating a boosted signal for a word line | Hideshi Miyatake, Masaki Kumanoya, Hideto Hidaka, Katsumi Dosaka, Yasuhiro Konishi | 1990-01-23 |
| 4890261 | Variable word length circuit of semiconductor memory | Hideto Hidaka, Yoshio Matsuda | 1989-12-26 |
| 4887136 | Semiconductor memory device and the method for manufacturing the same | Yoshio Matsuda | 1989-12-12 |
| 4855953 | Semiconductor memory device having stacked memory capacitors and method for manufacturing the same | Katsuhiro Tsukamoto, Masahiro Shimizu, Yoshio Matsuda | 1989-08-08 |
| 4839864 | Semiconductor memory device comprising programmable redundancy circuit | — | 1989-06-13 |
| 4835743 | Semiconductor memory device performing multi-bit Serial operation | Hideto Hidaka, Hideyuki Ozaki, Kazutoshi Hirayama | 1989-05-30 |
| 4833645 | Semiconductor memory device having improved resistance to alpha particle induced soft errors | Yoshio Matsuda | 1989-05-23 |
| 4833650 | Semiconductor memory device including programmable mode selection circuitry | Kazutoshi Hirayama, Hideyuki Ozaki, Hideto Hidaka | 1989-05-23 |
| 4811304 | MDS decoder circuit with high voltage suppression of a decoupling transistor | Yoshio Matsuda, Hideshi Miyatake | 1989-03-07 |
| 4808844 | Semiconductor device | Hideyuki Ozaki, Kazutoshi Hirayama, Hideto Hidaka | 1989-02-28 |
| 4809230 | Semiconductor memory device with active pull up | Yasuhiro Konishi, Masaki Kumanoya, Hideshi Miyatake, Hideto Hidaka, Katsumi Dosaka | 1989-02-28 |
| 4760559 | Semiconductor memory device | Hideto Hidaka, Masaki Kumanoya, Hideshi Miyatake, Katsumi Dosaka | 1988-07-26 |
| 4760556 | Nonvolatile semiconductor memory device | Mikio Deguchi, Yasushi Terada | 1988-07-26 |
| 4757476 | Dummy word line driving circuit for a MOS dynamic RAM | Masaki Kumanoya, Hideshi Miyatake, Hideto Hidaka, Katsumi Dosaka, Tsutomu Yoshihara | 1988-07-12 |
| 4736343 | Dynamic RAM with active pull-up circuit | Hideto Hidaka, Masaki Kumanoya, Hideshi Miyatake, Katsumi Dosaka, Yasuhiro Konishi | 1988-04-05 |