Issued Patents All Time
Showing 1–25 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6211070 | Peripheral structure of a chip as a semiconductor device, and manufacturing method thereof | Masanobu Iwasaki | 2001-04-03 |
| 5945716 | Semiconductor wafer and device structure | Masanobu Iwasaki | 1999-08-31 |
| 5883408 | Semiconductor memory device and method for making the same | — | 1999-03-16 |
| 5652168 | Method of forming a semiconductor device having a capacitor with improved element isolation and operation rate | Shigeki Komori | 1997-07-29 |
| 5534730 | Conductive layer connection structure of a semiconductor device and a method of manufacturing thereof | Kenichi Mori | 1996-07-09 |
| 5525821 | PN junction trench isolation type semiconductor device | Masana Harada | 1996-06-11 |
| 5478761 | Method of producing semiconductor device having first and second type field effect transistors | Shigeki Komori | 1995-12-26 |
| 5478759 | Method of manufacturing semiconductor device with retrograde wells | Tomoharu Mametani, Masahiro Shimizu, Hajime Arai, Heiji Kobayashi | 1995-12-26 |
| 5470799 | Method for pretreating semiconductor substrate by photochemically removing native oxide | Hiromi Itoh, Masanobu Iwasaki, Akira Tokui | 1995-11-28 |
| 5466623 | Method of making semiconductor integrated circuit having isolation oxide regions with different thickness | Masahiro Shimizu | 1995-11-14 |
| 5457339 | Semiconductor device for element isolation and manufacturing method thereof | Shigeki Komori | 1995-10-10 |
| 5448093 | Micro MIS type FET and manufacturing process therefor | Shigeru Kusunoki, Shigeki Komori | 1995-09-05 |
| 5427972 | Method of making a sidewall contact | Masahiro Shimizu | 1995-06-27 |
| 5412237 | Semiconductor device with improved element isolation and operation rate | Shigeki Komori | 1995-05-02 |
| 5407867 | Method of forming a thin film on surface of semiconductor substrate | Masanobu Iwasaki, Hiromi Itoh, Akira Tokui, Katsuyoshi Mitsui | 1995-04-18 |
| 5401671 | Method of manufacturing a semiconductor device | Shigeki Komori | 1995-03-28 |
| 5330923 | Manufacturing process for a micro MIS type FET | Shigeru Kusunoki, Shigeki Komori | 1994-07-19 |
| 5293060 | Semiconductor device with diffusion well isolation | Shigeki Komori | 1994-03-08 |
| 5268321 | Method of making DRAM cell having improved radiation protection | Masahiro Shimizu, Hiroki Shimano, Masahide Inuishi | 1993-12-07 |
| 5258319 | Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step | Masahide Inuishi | 1993-11-02 |
| 5258321 | Manufacturing method for semiconductor memory device having stacked trench capacitors and improved intercell isolation | Masahiro Shimizu, Masahide Inuishi | 1993-11-02 |
| 5250458 | Method for manufacturing semiconductor memory device having stacked memory capacitors | Masahiro Shimizu, Kazuyasu Fujishima, Yoshio Matsuda | 1993-10-05 |
| 5208473 | Lightly doped MISFET with reduced latchup and punchthrough | Shigeki Komori, Shigeru Kusunoki | 1993-05-04 |
| 5196908 | Micro MIS type FET and manufacturing process therefor | Shigeru Kusunoki, Shigeki Komori | 1993-03-23 |
| 5178682 | Method for forming a thin layer on a semiconductor substrate and apparatus therefor | Akira Tokui | 1993-01-12 |