Issued Patents All Time
Showing 176–195 of 195 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4982368 | Dynamic semiconductor memory device having an enlarged operating margin for information reading | — | 1991-01-01 |
| 4979013 | Semiconductor memory device | Kiyohiro Furutani, Koichiro Mashiko | 1990-12-18 |
| 4977542 | Dynamic semiconductor memory device of a twisted bit line system having improved reliability of readout | Yoshio Matsuda, Kazuyasu Fujishima, Tsukasa Ooishi, Masaki Tsukude | 1990-12-11 |
| 4947376 | Charge-transfer sense amplifier for dram and operating method therefor | Kiyohiro Furutani | 1990-08-07 |
| 4922460 | Semiconductor memory device with folded bit line structure suitable for high density | Kiyohiro Furutani | 1990-05-01 |
| 4910161 | Method of making a semiconductor memory device | — | 1990-03-20 |
| 4873669 | Random access memory device operable in a normal mode and in a test mode | Kiyohiro Furutani, Koichiro Mashiko, Noriaki Matsumoto, Yoshio Matsuda | 1989-10-10 |
| 4860070 | Semiconductor memory device comprising trench memory cells | Kiyohiro Furutani | 1989-08-22 |
| 4858193 | Preamplification method and apparatus for dram sense amplifiers | Kiyohiro Furutani | 1989-08-15 |
| 4849938 | Semiconductor memory device | Kiyohiro Furutani, Koichiro Mashiko, Noriaki Matsumoto, Yoshio Matsuda | 1989-07-18 |
| 4833518 | Semiconductor memory device having improved interconnection structure of memory cell array | Yoshio Matsuda, Koichiro Mashiko, Noriaki Matsumoto, Kiyohiro Furutani | 1989-05-23 |
| 4833653 | Dynamic random access memory having selectively activated subarrays | Koichiro Mashiko, Kiyohiro Furutani, Noriaki Matsumoto, Yoshio Matsuda | 1989-05-23 |
| 4829484 | Semiconductor memory device having self-refresh function | Kiyohiro Furutani | 1989-05-09 |
| 4817056 | Semiconductor memory device | Kiyohiro Furutani, Koichiro Mashiko, Noriaki Matsumoto, Yoshio Matsuda | 1989-03-28 |
| 4797001 | Substrate bias generator for use in dynamic random access memory | Noriaki Matsumoto, Koichiro Mashiko, Kiyohiro Furutani, Yoshio Matsuda | 1989-01-10 |
| 4788455 | CMOS reference voltage generator employing separate reference circuits for each output transistor | Shigeru Mori, Hiroshi Miyamoto, Tadato Yamagata, Michihiro Yamada | 1988-11-29 |
| 4788457 | CMOS row decoder circuit for use in row and column addressing | Koichiro Mashiko, Kiyohiro Furutani, Noriaki Matsumoto, Yoshio Matsuda | 1988-11-29 |
| 4788580 | Semiconductor memory and method of manufacturing the same | — | 1988-11-29 |
| 4710789 | Semiconductor memory device | Kiyohiro Furutani, Koichiro Mashiko | 1987-12-01 |
| 4641281 | Dynamic random access memory with hidden refresh control | Koichiro Mashiko, Michihiro Yamada, Hiroshi Miyamoto, Toshifumi Kobayashi, Yoshikazu Morooka | 1987-02-03 |