Issued Patents All Time
Showing 76–100 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7423465 | Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit | — | 2008-09-09 |
| 7423463 | Clock capture in clock synchronization circuitry | Adrian J. Drexler, Debra M. Bell, Seong-Hoon Lee | 2008-09-09 |
| 7423456 | Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods | Jongtae Kwak | 2008-09-09 |
| 7414444 | Clock capture in clock synchronization circuitry | Adrian J. Drexler, Debra M. Bell, Seong-Hoon Lee | 2008-08-19 |
| 7400389 | Method and apparatus for testing image sensors | Jeff Bruce | 2008-07-15 |
| 7398412 | Measure controlled delay with duty cycle control | — | 2008-07-08 |
| 7378891 | Measure-controlled circuit with frequency control | Debra M. Bell | 2008-05-27 |
| 7368965 | Clock capture in clock synchronization circuitry | Adrian J. Drexler, Debra M. Bell, Seong-Hoon Lee | 2008-05-06 |
| 7276947 | Delay circuit with reset-based forward path static delay | Eric Becker, Ross Dermott | 2007-10-02 |
| 7257884 | Method for fabricating semiconductor component with adjustment circuitry for electrical characteristics or input/output configuration | Aaron Schoenfeld, David J. Corisis | 2007-08-21 |
| 7259601 | Apparatus and method for suppressing jitter within a clock signal generator | Oliver F. Zarate | 2007-08-21 |
| 7259604 | Initialization scheme for a reduced-frequency, fifty percent duty cycle corrector | — | 2007-08-21 |
| 7253672 | System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal | David Zimlich | 2007-08-07 |
| 7250798 | Synchronous clock generator including duty cycle correction | Vinoth Kumar Deivasigamani | 2007-07-31 |
| 7218568 | Circuit and method for operating a delay-lock loop in a power saving manner | Scott E. Smith | 2007-05-15 |
| 7212053 | Measure-initialized delay locked loop with live measurement | Greg A. Blodgett | 2007-05-01 |
| 7212057 | Measure-controlled circuit with frequency control | Debra M. Bell | 2007-05-01 |
| 7208989 | Synchronous clock generator including duty cycle correction | Vinoth Kumar Deivasigamani | 2007-04-24 |
| 7177208 | Circuit and method for operating a delay-lock loop in a power saving manner | Scott E. Smith | 2007-02-13 |
| 7177170 | Apparatus and method for selectively configuring a memory device using a bi-stable relay | — | 2007-02-13 |
| 7145374 | Methods and apparatus for delay circuit | Feng Lin | 2006-12-05 |
| 7136157 | Method and apparatus for testing image sensors | Jeff Bruce | 2006-11-14 |
| 7126393 | Delay circuit with reset-based forward path static delay | Eric Becker, Ross Dermott | 2006-10-24 |
| 7116143 | Synchronous clock generator including duty cycle correction | Vinoth Kumar Deivasigamani | 2006-10-03 |
| 7111185 | Synchronization device with delay line control circuit to control amount of delay added to input signal and tuning elements to receive signal form delay circuit | Gary M. Johnson | 2006-09-19 |