Issued Patents All Time
Showing 51–75 of 282 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8619475 | Methods to operate a memory cell | Soojin Wi, Angelo Visconti, Silvia Beltrami, Christian Monzio Compagnoni, Alessandro Sottocornola Spinelli | 2013-12-31 |
| 8610194 | Semiconductor device with vertical gate and method for fabricating the same | — | 2013-12-17 |
| 8611152 | Non-volatile multilevel memory cells | — | 2013-12-17 |
| 8580645 | Memory devices and methods of forming memory devices | Kirk D. Prall, Behnam Moradi, Di Li, Chris Larsen | 2013-11-12 |
| 8536634 | Memory device transistors | — | 2013-09-17 |
| 8493792 | Programming method of non-volatile memory device | Soo Jin Wi | 2013-07-23 |
| 8493790 | NAND with back biased operation | Akira Goda | 2013-07-23 |
| 8467248 | Method, apparatus, and system for improved read operation in memory | — | 2013-06-18 |
| 8462548 | Non-volatile memory device capable of reducing floating gate-to-floating gate coupling effect during programming | — | 2013-06-11 |
| 8446011 | Devices and memory arrays including bit lines and bit line contacts | — | 2013-05-21 |
| 8441058 | Memory devices having reduced interference between floating gates and methods of fabricating such devices | — | 2013-05-14 |
| 8437186 | Non-volatile memory with both single and multiple level cells | — | 2013-05-07 |
| 8427880 | Operating memory cells | — | 2013-04-23 |
| 8415223 | Memory devices and methods of forming memory devices | Kirk D. Prall, Behnam Moradi, Di Li, Chris Larsen | 2013-04-09 |
| 8369147 | Non-volatile multilevel memory cell programming | — | 2013-02-05 |
| 8350309 | Nonvolatile semiconductor memory | Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Toshitake Yaegashi, Yuji Takeuchi +3 more | 2013-01-08 |
| 8339858 | Selecting programming voltages in response to at least a data latch in communication with a sense amplifier | — | 2012-12-25 |
| 8338879 | Transistor constructions and processing methods | — | 2012-12-25 |
| 8325520 | Reducing effects of program disturb in a memory device | — | 2012-12-04 |
| 8305810 | Multiple select gates with non-volatile memory cells | — | 2012-11-06 |
| 8264879 | Sensing memory cells | — | 2012-09-11 |
| 8259494 | Semiconductor memory device capable of realizing a chip with high operation reliability and high yield | Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhito Narita +1 more | 2012-09-04 |
| 8248849 | Semiconductor memory device capable of realizing a chip with high operation reliability and high yield | Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhito Narita +1 more | 2012-08-21 |
| 8238155 | Multilevel memory cell operation | Akira Goda | 2012-08-07 |
| 8238167 | Memory voltage cycle adjustment | — | 2012-08-07 |