Issued Patents All Time
Showing 25 most recent of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393354 | Data masking for memory | Jahanshir J. Javanifard, Daniele Vimercati | 2025-08-19 |
| 12307128 | Memory activation timing management | Daniele Balluchi, Giorgio Servalli | 2025-05-20 |
| 12300298 | Differential storage in memory arrays | Durai Vishak Nirmal Ramaswamy, Giorgio Servalli, Marcello Mariani, Alessandro Calderoni | 2025-05-13 |
| 12266394 | Robust functionality for memory management associated with high-temperature storage and other conditions | Jonathan J. Strand | 2025-04-01 |
| 12237002 | Memory cell biasing techniques during a read operation | Andrea Locatelli, Giorgio Servalli | 2025-02-25 |
| 12222835 | Systems and methods to manage memory during power down and storage | John D. Porter | 2025-02-11 |
| 12183380 | Read operations based on a dynamic reference | Ferdinando Bedeschi, Umberto Di Vincenzo, Riccardo Muzzetto | 2024-12-31 |
| 12131765 | Word line precharging systems and methods | — | 2024-10-29 |
| 12112785 | Apparatuses, systems, and methods for configurable memory | Giorgio Servalli | 2024-10-08 |
| 12094512 | Digit line voltage boosting systems and methods | Andrea Locatelli | 2024-09-17 |
| 12050784 | Data masking for memory | Jahanshir J. Javanifard, Daniele Vimercati | 2024-07-30 |
| 12002505 | Managing memory based on access duration | Riccardo Pazzocco | 2024-06-04 |
| 12001706 | Predictive sanitization of an array of memory with capacitive cells and/or ferroelectric cells | Marco Sforzin, Giorgio Servalli, Daniele Balluchi, Paolo Amato | 2024-06-04 |
| 11908506 | Memory cell biasing techniques | Giorgio Servalli, Andrea Locatelli | 2024-02-20 |
| 11900980 | Techniques to mitigate asymmetric long delay stress | — | 2024-02-13 |
| 11862221 | Switch and hold biasing for memory cell imprint recovery | — | 2024-01-02 |
| 11749330 | Charge leakage detection for memory system reliability | Riccardo Pazzocco, Jonathan J. Strand, Kevin T. Majerus | 2023-09-05 |
| 11742002 | Memory activation timing management | Daniele Balluchi, Giorgio Servalli | 2023-08-29 |
| 11721379 | Cell disturb on power state transition | Jahanshir J. Javanifard | 2023-08-08 |
| 11693735 | Erasure decoding for a memory device | Richard E. Fackenthal | 2023-07-04 |
| 11688449 | Memory management for charge leakage in a memory device | — | 2023-06-27 |
| 11670357 | Memory system configured to perform a reset on one or more non-volatile memory cells upon transitioning power states | Jahanshir J. Javanifard | 2023-06-06 |
| 11514968 | Charge leakage detection for memory system reliability | Riccardo Pazzocco, Jonathan J. Strand, Kevin T. Majerus | 2022-11-29 |
| 11430522 | Programming of memory devices | Silvia Beltrami | 2022-08-30 |
| 11348635 | Memory cell biasing techniques during a read operation | Andrea Locatelli, Giorgio Servalli | 2022-05-31 |