Issued Patents All Time
Showing 126–150 of 202 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10359933 | Memory devices and electronic systems having a hybrid cache including static and dynamic caches with single and multiple bits per cell, and related methods | Kishore Kumar Muchherla, Ashutosh Malshe, Sampath K. Ratnam, Michael G. Miller, Christopher S. Hale +1 more | 2019-07-23 |
| 10354732 | NAND temperature data management | Kishore Kumar Muchherla, Sampath K. Ratnam, Preston A. Thomson, Harish Reddy Singidi, Jung Sheng Hoei +1 more | 2019-07-16 |
| 10347344 | Read voltage calibration based on host IO operations | Ashutosh Malshe, Kishore Kumar Muchherla, Harish Reddy Singidi, Sampath K. Ratnam, Kulachet Tanpairoj +1 more | 2019-07-09 |
| 10325668 | Operation of mixed mode blocks | Kishore Kumar Muchherla, Ashutosh Malshe, Preston A. Thomson, Michael G. Miller, Gary F. Besinga +3 more | 2019-06-18 |
| 10324839 | Trim setting determination on a memory device | Aswin Thiruvengadam, Daniel L. Lowrance | 2019-06-18 |
| 10318378 | Redundant array of independent NAND for a three-dimensional memory array | Jung Sheng Hoei, Sampath K. Ratnam, Renato C. Padilla, Kishore Kumar Muchherla, Sivagnanam Parthasarathy | 2019-06-11 |
| 10303535 | Identifying asynchronous power loss | Michael G. Miller, Ashutosh Malshe, Violante Moschiano, Gary F. Besinga, Sampath K. Ratnam +4 more | 2019-05-28 |
| 10223259 | Memory device with dynamic storage mode control | Yun Li, Kishore Kumar Muchherla, Ashutosh Malshe, Daniel J. Hubbard, Christopher S. Hale +2 more | 2019-03-05 |
| 10141056 | Memories including multiple arrays of non-volatile memory cells selectively connected to sense circuitry using different numbers of data lines | Koji Sakui | 2018-11-27 |
| 10108684 | Data signal mirroring | Michael Abraham | 2018-10-23 |
| 10089250 | State change in systems having devices coupled in a chained configuration | William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo | 2018-10-02 |
| 10014053 | Methods for backup sequence using three transistor memory cell devices | Koji Sakui | 2018-07-03 |
| 10007465 | Remapping in a memory device | Lance W. Dover, Jim Cooke | 2018-06-26 |
| 9929967 | Packet deconstruction/reconstruction and link-control | William H. Radke, Victor Y. Tsai, Neal A. Galbo, Robert N. Leibowitz | 2018-03-27 |
| 9921898 | Identifying asynchronous power loss | Michael G. Miller, Ashutosh Malshe, Violante Moschiano, Gary F. Besinga, Sampath K. Ratnam +4 more | 2018-03-20 |
| 9811258 | Methods for controlling host memory access with memory devices and systems | Neal A. Galbo, William H. Radke, Victor Y. Tsai, Robert N. Leibowitz | 2017-11-07 |
| 9767904 | Memory with three transistor memory cell device | Koji Sakui | 2017-09-19 |
| 9588697 | Host controller | Robert N. Leibowitz, William H. Radke, Neal A. Galbo, Victor Y. Tsai | 2017-03-07 |
| 9552257 | Memory cell coupling compensation | Zhenlei Shen, William H. Radke | 2017-01-24 |
| 9391082 | Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods | Koji Sakui | 2016-07-12 |
| 9318220 | Memory cell coupling compensation | Zhenlei Shen, William H. Radke | 2016-04-19 |
| 9312023 | Devices and methods of programming memory cells | Koichi Kawai, Koji Sakui | 2016-04-12 |
| 9293214 | Determining and using soft data in memory devices and systems | William H. Radke, Zhenlei Shen | 2016-03-22 |
| 9293213 | Sensing data stored in memory | Koji Sakui | 2016-03-22 |
| 9269450 | Methods, devices, and systems for adjusting sensing voltages in devices | William H. Radke, Zhenlei Shen | 2016-02-23 |