Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE35825 | Method for maintaining optimum biasing voltage and standby current levels in a DRAM array having repaired row-to-column shorts | — | 1998-06-16 |
| 5761145 | Efficient method for obtaining usable parts from a partially good memory integrated circuit | Brent Keeth, Adrian E. Ong | 1998-06-02 |
| 5747869 | Reduced pitch laser redundancy fuse bank structure | Kirk D. Prall, Tod S. Stone | 1998-05-05 |
| RE35750 | Wordline driver circuit having an automatic precharge circuit | Stephen L. Casper, Adrian E. Ong | 1998-03-24 |
| 5726931 | DRAM with open digit lines and array edge reference sensing | Mirmajid Seyyedy | 1998-03-10 |
| 5696732 | Burst EDO memory device | Brett Williams | 1997-12-09 |
| 5677884 | Circuit for cancelling and replacing redundant elements | Adrian E. Ong | 1997-10-14 |
| 5675549 | Burst EDO memory device address counter | Adrian E. Ong, Brett L. Wiliams, Troy A. Manning | 1997-10-07 |
| 5668773 | Synchronous burst extended data out DRAM | Troy A. Manning, Todd A. Merritt | 1997-09-16 |
| 5666323 | Synchronous NAND DRAM architecture | — | 1997-09-09 |
| 5661695 | Burst EDO memory device | Brett Williams | 1997-08-26 |
| 5636172 | Reduced pitch laser redundancy fuse bank structure | Kirk D. Prall, Tod S. Stone | 1997-06-03 |
| 5608668 | Dram wtih open digit lines and array edge reference sensing | Mirmajid Seyyedy | 1997-03-04 |
| 5587671 | Semiconductor device having an output buffer which reduces signal degradation due to leakage of current | Troy A. Manning | 1996-12-24 |
| 5586080 | Local word line phase driver | George B. Raad, Todd A. Merritt | 1996-12-17 |
| 5552739 | Integrated circuit power supply having piecewise linearity | Brent Keeth, Brian M. Shirley, Stephen L. Casper | 1996-09-03 |
| 5544124 | Optimization circuitry and control for a synchronous memory device with programmable latency period | Scott E. Schaefer | 1996-08-06 |
| 5528539 | High speed global row redundancy system | Adrian E. Ong | 1996-06-18 |
| 5526320 | Burst EDO memory device | Brett Williams, Troy A. Manning | 1996-06-11 |
| 5513148 | Synchronous NAND DRAM architecture | — | 1996-04-30 |
| 5488583 | Memory integrated circuits having on-chip topology logic driver, and methods for testing and producing such memory integrated circuits | Adrian E. Ong, William K. Waller | 1996-01-30 |
| 5465232 | Sense circuit for tracking charge transfer through access transistors in a dynamic random access memory | Adrian E. Ong | 1995-11-07 |
| 5384500 | Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes | Mark Hawes | 1995-01-24 |
| 5325331 | Improved device for sensing information store in a dynamic memory | Ward Parkinson | 1994-06-28 |
| 5315177 | One time programmable fully-testable programmable logic device with zero power and anti-fuse cell architecture | Kurt P. Douglas | 1994-05-24 |